This is an automated email from Gerrit. Tomas Vanek ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/4724
-- gerrit commit 3a66d4f7bc690f4611263209184c877fc6a0ef87 Author: Tomas Vanek <[email protected]> Date: Wed Oct 17 13:07:43 2018 +0200 tcl/target: at91samd and at91sam4l converted to the new reset platform Change-Id: I0adad407b03d0a8fcdfd1d00075a94cabcdbbcf3 Signed-off-by: Tomas Vanek <[email protected]> diff --git a/tcl/target/at91sam4lXX.cfg b/tcl/target/at91sam4lXX.cfg index 4aee7d0..f526b8d 100644 --- a/tcl/target/at91sam4lXX.cfg +++ b/tcl/target/at91sam4lXX.cfg @@ -11,10 +11,28 @@ flash bank $_FLASHNAME at91sam4l 0x00000000 0 1 1 $_TARGETNAME # # smap_reset_deassert configures whether we want to run or halt out of reset, # then instruct the SMAP to let us out of reset. -$_TARGETNAME configure -event reset-deassert-post "at91sam4l smap_reset_deassert" +proc sam4l_reset_handler { phase target { secondary_core 0 } } { + if [arp_is_tap_enabled $target] { + if [reset_config_includes srst] { + if [reset_config_includes srst_nogate] { + echo "Wrong reset configuration! $target requires 'reset_config srst_gates_jtag'" + } else { + arp_reset_plan_srst_dbg_cleared $phase $target + } + } else { + arp_reset_plan_no_srst $phase $target + } + switch $phase { + post { + at91sam4l smap_reset_deassert + } + } + } +} + +set_arp_reset_handler $_TARGETNAME sam4l_reset_handler # SRST (wired to RESET_N) resets debug circuitry -# srst_pulls_trst is not configured here to avoid an error raised in reset halt reset_config srst_gates_jtag # SAM4L starts from POR with SYSCLK set to 115kHz RCSYS, needs slow JTAG speed. diff --git a/tcl/target/at91samdXX.cfg b/tcl/target/at91samdXX.cfg index f0644d1..8ee793f 100644 --- a/tcl/target/at91samdXX.cfg +++ b/tcl/target/at91samdXX.cfg @@ -46,12 +46,28 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE # # dsu_reset_deassert configures whether we want to run or halt out of reset, # then instruct the DSU to let us out of reset. -$_TARGETNAME configure -event reset-deassert-post { - at91samd dsu_reset_deassert +proc samd_reset_handler { phase target { secondary_core 0 } } { + if [arp_is_tap_enabled $target] { + if [reset_config_includes srst] { + if [reset_config_includes srst_nogate] { + echo "Wrong reset configuration! $target requires 'reset_config srst_gates_jtag'" + } else { + arp_reset_plan_srst_dbg_cleared $phase $target + } + } else { + arp_reset_plan_no_srst $phase $target + } + switch $phase { + post { + at91samd dsu_reset_deassert + } + } + } } +set_arp_reset_handler $_TARGETNAME samd_reset_handler + # SRST (wired to RESET_N) resets debug circuitry -# srst_pulls_trst is not configured here to avoid an error raised in reset halt reset_config srst_gates_jtag # Do not use a reset button with other SWD adapter than Atmel's EDBG. -- _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
