On Sun, Feb 10, 2019 at 09:32:21AM +0100, Daniel Glöckner wrote: > These are the cores that describe this feature in their TRM: > http://infocenter.arm.com/help/topic/com.arm.doc.ddi0535c/CHDHEDFB.html > http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/CHDGECEI.html > http://infocenter.arm.com/help/topic/com.arm.doc.ddi0434c/BABEJGAD.html > http://infocenter.arm.com/help/topic/com.arm.doc.ddi0500j/CHDGECEI.html > http://infocenter.arm.com/help/topic/com.arm.doc.100048_0100_06_en/jfa1406793209753.html > http://infocenter.arm.com/help/topic/com.arm.doc.100026_0101_01_en/fvt1487860123116.html
The list is not complete. Here are some older cores which allow the caches and/or TLB to be read: http://infocenter.arm.com/help/topic/com.arm.doc.ddi0151c/Chdbejgb.html http://infocenter.arm.com/help/topic/com.arm.doc.ddi0184b/Chdbejgb.html http://infocenter.arm.com/help/topic/com.arm.doc.ddi0198e/Babechib.html http://infocenter.arm.com/help/topic/com.arm.doc.ddi0201d/I1032795.html http://infocenter.arm.com/help/topic/com.arm.doc.ddi0211k/Cbafcbeb.html http://infocenter.arm.com/help/topic/com.arm.doc.ddi0338g/Cbafcbeb.html Best regards, Daniel _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
