Am 10.02.19 um 17:25 schrieb Matthias Welwarsky: > On Sonntag, 10. Februar 2019 11:35:09 CET Oleksij Rempel wrote: >> Am 10.02.19 um 10:29 schrieb Daniel Glöckner: >>> On Sun, Feb 10, 2019 at 09:32:21AM +0100, Daniel Glöckner wrote: >>>> These are the cores that describe this feature in their TRM: >>>> http://infocenter.arm.com/help/topic/com.arm.doc.ddi0535c/CHDHEDFB.html >>>> http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/CHDGECEI.html >>>> http://infocenter.arm.com/help/topic/com.arm.doc.ddi0434c/BABEJGAD.html >>>> http://infocenter.arm.com/help/topic/com.arm.doc.ddi0500j/CHDGECEI.html >>>> http://infocenter.arm.com/help/topic/com.arm.doc.100048_0100_06_en/jfa140 >>>> 6793209753.html >>>> http://infocenter.arm.com/help/topic/com.arm.doc.100026_0101_01_en/fvt14 >>>> 87860123116.html> >>> The list is not complete. Here are some older cores which allow the >>> caches and/or TLB to be read: >>> http://infocenter.arm.com/help/topic/com.arm.doc.ddi0151c/Chdbejgb.html >>> http://infocenter.arm.com/help/topic/com.arm.doc.ddi0184b/Chdbejgb.html >>> http://infocenter.arm.com/help/topic/com.arm.doc.ddi0198e/Babechib.html >>> http://infocenter.arm.com/help/topic/com.arm.doc.ddi0201d/I1032795.html >>> http://infocenter.arm.com/help/topic/com.arm.doc.ddi0211k/Cbafcbeb.html >>> http://infocenter.arm.com/help/topic/com.arm.doc.ddi0338g/Cbafcbeb.html >> >> Do any one worked with tools which implement this functionality? What is >> a usual workflow with it? Just manually compare the caches or do some >> scripted cache validation? Should it some how cooperate with gdb? > > I have worked with Lauterbach TRACE32. It was sometimes helpful to see D > cache > lines of DMA buffers when you look for e.g. corrupted RX/TX ethernet packets > etc. I didn't need to use TLB inspection yet. > > TRACE32 has a good deal of integration in their debug view, e.g. you can see > in a source browser during debugging which variables are in the data cache > etc, very helpful for optimizing inner loops. > > I don't know if GDB has any support for that level of introspection, but I > doubt it.
I coded here a proof of concept cache dump tcl script for cortex a7 https://github.com/olerem/openocd/commit/983e55b11ea18447ff815c1b043006f21d663ac4 May be some one with more experience can validate it? -- Regards, Oleksij
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