This is an automated email from Gerrit. Christopher Head ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/5029
-- gerrit commit 0ee9ffb29c6096f5627ffe08c86ebaf9e6ef15a0 Author: Christopher Head <[email protected]> Date: Mon Apr 1 16:06:30 2019 -0700 Document the mem_ap target type Change-Id: I56e971b38f20db8c4ad0cdee5cc42b42a25319ea Signed-off-by: Christopher Head <[email protected]> diff --git a/doc/openocd.texi b/doc/openocd.texi index 027e6d2..f5852cc 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -4367,6 +4367,7 @@ compact Thumb2 instruction set. The current implementation supports eSi-32xx cores. @item @code{fa526} -- resembles arm920 (w/o Thumb) @item @code{feroceon} -- resembles arm926 +@item @code{mem_ap} -- this is an ARM debug infrastructure Access Port without a CPU, through which bus read and write cycles can be generated; it may be useful for working with non-CPU hardware behind an AP or during development of support for new CPUs. @item @code{mips_m4k} -- a MIPS core @item @code{xscale} -- this is actually an architecture, not a CPU type. It is based on the ARMv5 architecture. -- _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
