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Florian Fainelli ([email protected]) just uploaded a new patch set to 
Gerrit, which you can find at http://openocd.zylin.com/5212

-- gerrit

commit 29ecd2959e3d0b8c3eac4e1a7265b08d9a9c8903
Author: Florian Fainelli <[email protected]>
Date:   Tue Mar 19 10:36:39 2019 -0700

    armv7a_mmu: Add support for decoding Super Sections
    
    The ARMv7-A architecture supports super sections which allows mapping
    physical addresses up to 36-bit into a 32-bit virtual address using the
    short descriptor format (see ARM DDI 4006C.c section B4.1.112 for
    details).
    
    Change-Id: I8e64d0e93e36ae7a7da7b7bf2a8342856bb044f1
    Signed-off-by: Florian Fainelli <[email protected]>

diff --git a/src/target/armv7a_mmu.c b/src/target/armv7a_mmu.c
index 7af1137..c8f85cf 100644
--- a/src/target/armv7a_mmu.c
+++ b/src/target/armv7a_mmu.c
@@ -128,7 +128,7 @@ int armv7a_mmu_translate_va_pa(struct target *target, 
uint32_t va,
        struct armv7a_common *armv7a = target_to_armv7a(target);
        struct arm_dpm *dpm = armv7a->arm.dpm;
        uint32_t virt = va & ~0xfff;
-       uint32_t NOS, NS, INNER, OUTER;
+       uint32_t NOS, NS, INNER, OUTER, SS;
        *val = 0xdeadbeef;
        retval = dpm->prepare(dpm);
        if (retval != ERROR_OK)
@@ -148,15 +148,30 @@ int armv7a_mmu_translate_va_pa(struct target *target, 
uint32_t va,
        NS = (*val >> 9) & 1;   /* Non secure */
        INNER = (*val >> 4) &  0x7;
        OUTER = (*val >> 2) & 0x3;
+       SS = (*val >> 1) & 1;
 
        if (retval != ERROR_OK)
                goto done;
+
        *val = (*val & ~0xfff)  +  (va & 0xfff);
+       if (SS) {
+#if BUILD_TARGET64
+               uint32_t pa;
+               pa = (uint32_t)*val;
+               /* PAR[31:24] contains PA[31:24] */
+               *val = pa & 0xff000000;
+               /* PAR [23:16] contains PA[39:32] */
+               *val |= (target_addr_t)(pa & 0x00ff0000) << 16;
+#else
+               LOG_WARNING("Super section found with no 64-bit addresses 
support!");
+#endif
+       }
        if (meminfo) {
-               LOG_INFO("%" PRIx32 " : %" TARGET_PRIxADDR " %s outer shareable 
%s secured",
+               LOG_INFO("%" PRIx32 " : %" TARGET_PRIxADDR " %s outer shareable 
%s secured %s super section",
                        va, *val,
                        NOS == 1 ? "not" : " ",
-                       NS == 1 ? "not" : "");
+                       NS == 1 ? "not" : "",
+                       SS == 0 ? "not" : "");
                switch (OUTER) {
                        case 0:
                                LOG_INFO("outer: Non-Cacheable");

-- 


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