---
** [tickets:#242] STM32L0x too high SWD clock**
**Status:** new
**Milestone:** 0.9.0
**Labels:** STM32
**Created:** Thu Jul 04, 2019 04:30 PM UTC by Patrik Bachan
**Last Updated:** Thu Jul 04, 2019 04:30 PM UTC
**Owner:** nobody
Hi,
when calling `reset init` on STM32L0x target, function `stm32l0_enable_HSI16`
is called which bumps SWD frequency to 2500kHz. My adapter (STlink-V2) rounds
it to 1800MHz, but it is still too high. Communication breaks and reset is
needed. Wiring might be problem, I am not sure. (F7 worked on 1800kHz
flawlessly with significantly longer wires)
My point is, that 2.5MHz is pretty high clock frequency to set it so blindly.
---
Sent from sourceforge.net because openocd-devel@lists.sourceforge.net is
subscribed to https://sourceforge.net/p/openocd/tickets/
To unsubscribe from further messages, a project admin can change settings at
https://sourceforge.net/p/openocd/admin/tickets/options. Or, if this is a
mailing list, you can unsubscribe from the mailing list.
_______________________________________________
OpenOCD-devel mailing list
OpenOCD-devel@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/openocd-devel
