I have a RISC-V target with 2 TAP controllers chained together. The first controller connects to a core that's always accessible. The second controller connects to a core that's only accessible after the first core has done some setup, which (at least initially) requires the debugger.
If I just configure both of those and connect then OpenOCD errors out because examine() fails on the core behind the second controller because it's not powered up yet. How can I change the code to make this case work? Is there an example for some other target? Tim
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