This is an automated email from Gerrit.
Edward Fewell (efew...@ti.com) just uploaded a new patch set to Gerrit, which
you can find at http://openocd.zylin.com/5489
-- gerrit
commit d9d95419d8181101387731e6b8021fc4aad7d159
Author: Edward Fewell <efew...@ti.com>
Date: Mon Mar 2 14:04:24 2020 -0600
tcl/target: Enable using vectreset for CC3320SF targets
On CC32xx family of devices, sysrequest is disabled, and
vectreset is blocked by the boot loader (stops in a while(1)
statement). srst reset can leave the target in a state
that prevents debug.
This change enables using vectreset on SF variants by
moving the PC to the start of the user application in
internal flash. This allows for a more reliable reset,
but with two caveats:
1) This only works for the SF variant with internal
flash.
2) This only resets the CPU and not any peripherals.
Tested on CC3220SF rev B Launchpad in both SWD and
JTAG modes. Confirmed proper behavior of reset,
reset init, reset halt, and reset run commands.
Change-Id: Ibc042d785c846c2223ae55b8f2410b75ed2df354
Signed-off-by: Edward Fewell <efew...@ti.com>
diff --git a/tcl/target/ti_cc3220sf.cfg b/tcl/target/ti_cc3220sf.cfg
index f7d9bfe..5a4d2bc 100644
--- a/tcl/target/ti_cc3220sf.cfg
+++ b/tcl/target/ti_cc3220sf.cfg
@@ -6,7 +6,97 @@
source [find target/swj-dp.tcl]
source [find target/icepick.cfg]
-source [find target/ti_cc32xx.cfg]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME cc32xx
+}
+
+#
+# Main DAP
+#
+if { [info exists DAP_TAPID] } {
+ set _DAP_TAPID $DAP_TAPID
+} else {
+ if {[using_jtag]} {
+ set _DAP_TAPID 0x4BA00477
+ } else {
+ set _DAP_TAPID 0x2BA01477
+ }
+}
+
+if {[using_jtag]} {
+ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf
-expected-id $_DAP_TAPID -disable
+ jtag configure $_CHIPNAME.cpu -event tap-enable "icepick_c_tapenable
$_CHIPNAME.jrc 0"
+} else {
+ swj_newdap $_CHIPNAME cpu -expected-id $_DAP_TAPID
+}
+
+#
+# ICEpick-C (JTAG route controller)
+#
+if { [info exists JRC_TAPID] } {
+ set _JRC_TAPID $JRC_TAPID
+} else {
+ set _JRC_TAPID 0x0B97C02F
+}
+
+if {[using_jtag]} {
+ jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f
-expected-id $_JRC_TAPID -ignore-version
+ jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable
$_CHIPNAME.cpu"
+}
+
+set _TARGETNAME $_CHIPNAME.cpu
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
+
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x2000
+}
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size
$_WORKAREASIZE -work-area-backup 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cc3220sf 0 0 0 0 $_TARGETNAME
+
+#
+# On CC32xx family of devices, sysreqreset is disabled, and vectreset is
+# blocked by the boot loader (stops in a while(1) statement). srst reset can
+# leave the target in a state that prevents debug. The following uses vectreset
+# to reset the target but then moves the PC to start of the user application
+# in internal flash. This allows for a more reliable reset, but with two
+# caveats: it only works for the SF variant that has internal flash, and
+# it only resets the CPU and not any peripherals.
+#
+
+cortex_m reset_config vectreset
+
+proc ocd_process_reset_inner { MODE } {
+ # Use DEMCR to enable halt on reset
+ mww 0xe000edfc 1
+
+ cc32xx.cpu invoke-event reset-assert-pre
+ cc32xx.cpu arp_reset assert 0
+ cc32xx.cpu invoke-event reset-assert-post
+ cc32xx.cpu invoke-event reset-deassert-pre
+ cc32xx.cpu invoke-event reset-deassert-post
+
+ cc32xx.cpu arp_halt
+ catch { cc32xx.cpu arp_waitstate halted 500 }
+
+ # Intialize MSP and PC from user reset vector at flash 0x01000800
+ mem2array boot 32 0x01000800 2
+
+ reg msp $boot(0)
+ reg psp $boot(0)
+ reg pc $boot(1)
+
+ if { 0 == [string compare $MODE run ] } {
+ resume
+ }
+
+ cc32xx.cpu invoke-event reset-end
+}
--
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