This is an automated email from Gerrit. Tarek BOCHKATI ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/5797
-- gerrit commit bd3e9889ab310b46ab0a2f60aa12f6c1ad12992e Author: Tarek BOCHKATI <[email protected]> Date: Tue Aug 11 12:56:36 2020 +0100 armv8-m: add SecureFault exception Change-Id: I4e1963631e834b6334bc917e956c2db4464b7b08 Signed-off-by: Laurent LEMELE <[email protected]> Signed-off-by: Tarek BOCHKATI <[email protected]> diff --git a/src/target/armv7m.c b/src/target/armv7m.c index 017d693..ea6ee61 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -48,7 +48,7 @@ static const char * const armv7m_exception_strings[] = { "", "Reset", "NMI", "HardFault", - "MemManage", "BusFault", "UsageFault", "RESERVED", + "MemManage", "BusFault", "UsageFault", "SecureFault", "RESERVED", "RESERVED", "RESERVED", "SVCall", "DebugMonitor", "RESERVED", "PendSV", "SysTick" }; diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index 5ea928a..62e0846 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -445,6 +445,14 @@ static int cortex_m_examine_exception_reason(struct target *target) if (retval != ERROR_OK) return retval; break; + case 7: /* Secure Fault */ + retval = mem_ap_read_u32(armv7m->debug_ap, NVIC_SFSR, &except_sr); + if (retval != ERROR_OK) + return retval; + retval = mem_ap_read_u32(armv7m->debug_ap, NVIC_SFAR, &except_ar); + if (retval != ERROR_OK) + return retval; + break; case 11: /* SVCall */ break; case 12: /* Debug Monitor */ diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h index a767f93..794eda4 100644 --- a/src/target/cortex_m.h +++ b/src/target/cortex_m.h @@ -114,6 +114,7 @@ #define VC_MMERR BIT(4) #define VC_CORERESET BIT(0) +/* NVIC registers */ #define NVIC_ICTR 0xE000E004 #define NVIC_ISE0 0xE000E100 #define NVIC_ICSR 0xE000ED04 @@ -127,6 +128,8 @@ #define NVIC_DFSR 0xE000ED30 #define NVIC_MMFAR 0xE000ED34 #define NVIC_BFAR 0xE000ED38 +#define NVIC_SFSR 0xE000EDE4 +#define NVIC_SFAR 0xE000EDE8 /* NVIC_AIRCR bits */ #define AIRCR_VECTKEY (0x5FAul << 16) -- _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
