нд, 20 черв. 2021 о 00:42 Andreas Bolsch <hyphen0br...@gmail.com> пише:
> On 2021-06-19 22:58, Oleksandr Redchuk wrote:
>
> > FT2232D-based adapter
> > The same behavior as Ali Tekin reported:
> > "Error: error writing to flash at address 0x08000000 at offset
> > 0x00000000"
> >> On 2021-06-17 14:51, ali tekin wrote:
>
> Do you get this warning below, too? Could you post the cfg file?
> >> > Warn : target was in unknown state when halt was requested
Yes, exactly the same.
Info : starting gdb server for stm32l0.cpu on 3333
Info : Listening on port 3333 for gdb connections
target halted due to debug-request, current mode: Thread
xPSR: 0xf1000000 pc: 0x08001110 msp: 0x200007f8
Info : Device: STM32L0xx (Cat. 3)
Info : STM32L flash size is 64kb, base address is 0x8000000
Info : Padding image section 0 at 0x08002054 with 8076 bytes
Warn : target was in unknown state when halt was requested
Info : SWD DPIDR 0x0bc11477
Info : SWD DPIDR 0x0bc11477
Error: error writing to flash at address 0x08000000 at offset 0x00000000
== Command line
=== ST-Link (OK)
openocd-h -d3 -f interface/stlink-v2.cfg -c "reset_config srst_only
srst_nogate connect_assert_srst" \
-f ../tools/oocd-stm32l011.cfg -c init -c "reset halt" \
-c "flash write_image erase ./exe/WM21.hex" -c "verify_image
./exe/WM21.hex" \
-c "reset run" -c shutdown
=== FTDI board (FAIL)
openocd-h -d3 -f ../tools/ft-swd.cfg -c "reset_config connect_assert_srst" \
-f ../tools/oocd-stm32l011.cfg -c init -c "reset halt" \
-c "flash write_image erase ./exe/WM21.hex" -c "verify_image
./exe/WM21.hex" \
-c "reset run" \
-c "ftdi_set_signal LEDG 1" \
-c shutdown
== FTDI board config
#
# FT2232-SWD (my-swd)
interface ftdi
ftdi_device_desc "Dual RS232"
ftdi_vid_pid 0x0403 0x6010
# data, direction
ftdi_layout_init 0x0C1A 0x0CFB
# for patched OpenOCD
# data, direction, data mask, direction mask
#ftdi_layout_quit 0x00A0 0x0000 0x00A0 0x0000
# OpenOCD defined signals
ftdi_layout_signal nSRST -noe 0x0010
ftdi_layout_signal LED -ndata 0x0800
ftdi_layout_signal SWD_EN -ndata 0x0040
ftdi_layout_signal SWDIO_OE -ndata 0x0080
# User output
ftdi_layout_signal LEDG -ndata 0x0400
#
reset_config srst_only srst_nogate
#
transport select swd
== oocd-stm32l011.cfg
#
# This project can use STM32L011K4T and STM32L051K*T
# Limit size to 2KB
#
set WORKAREASIZE 0x800
source [find target/stm32l0.cfg]
== FTDI log (-d3) -- the first assembly code run
...
Debug: 1638 1136 target.c:2690 target_write_u32(): address: 0x40022010,
value: 0x8c9daebf
Debug: 1639 1137 target.c:2690 target_write_u32(): address: 0x40022010,
value: 0x13141516
Debug: 1640 1138 target.c:2602 target_read_u32(): address: 0x40022004,
value: 0x00000004
Debug: 1641 1138 target.c:2028 target_alloc_working_area_try(): MMU
disabled, using physical address for working memory 0x20000000
Debug: 1642 1138 target.c:2082 target_alloc_working_area_try(): allocated
new working area of 16 bytes at address 0x20000000
Debug: 1643 1138 target.c:1949 print_wa_layout(): * 0x20000000-0x2000000f
(16 bytes)
Debug: 1644 1138 target.c:1949 print_wa_layout(): 0x20000010-0x200007ff
(2032 bytes)
Debug: 1645 1138 target.c:2387 target_write_buffer(): writing buffer of 16
byte at 0x20000000
Debug: 1646 1139 target.c:2082 target_alloc_working_area_try(): allocated
new working area of 1024 bytes at address 0x20000010
Debug: 1647 1139 target.c:1949 print_wa_layout(): * 0x20000000-0x2000000f
(16 bytes)
Debug: 1648 1139 target.c:1949 print_wa_layout(): * 0x20000010-0x2000040f
(1024 bytes)
Debug: 1649 1139 target.c:1949 print_wa_layout(): 0x20000410-0x200007ff
(1008 bytes)
Debug: 1650 1140 target.c:2602 target_read_u32(): address: 0x40022004,
value: 0x00000004
Debug: 1651 1141 target.c:2602 target_read_u32(): address: 0x40022004,
value: 0x00000004
Debug: 1652 1141 target.c:2690 target_write_u32(): address: 0x40022004,
value: 0x00000404
Debug: 1653 1143 target.c:2602 target_read_u32(): address: 0x40022004,
value: 0x00000404
Debug: 1654 1143 target.c:2690 target_write_u32(): address: 0x40022004,
value: 0x0000040c
Debug: 1655 1143 target.c:2387 target_write_buffer(): writing buffer of
1024 byte at 0x20000010
Debug: 1656 1146 ftdi.c:1163 ftdi_swd_queue_cmd(): Increased SWD command
queue to 20 elements
Debug: 1657 1150 ftdi.c:1163 ftdi_swd_queue_cmd(): Increased SWD command
queue to 40 elements
Debug: 1658 1158 ftdi.c:1163 ftdi_swd_queue_cmd(): Increased SWD command
queue to 80 elements
Debug: 1659 1173 ftdi.c:1163 ftdi_swd_queue_cmd(): Increased SWD command
queue to 160 elements
Debug: 1660 1194 target.c:1834 target_call_event_callbacks(): target event
3 (resume-start) for core stm32l0.cpu
Debug: 1661 1194 armv7m.c:183 armv7m_restore_context():
Debug: 1662 1195 armv7m.c:447 armv7m_write_core_reg(): write
pmsk_bpri_fltmsk_ctrl value 0x00000001
Debug: 1663 1195 armv7m.c:447 armv7m_write_core_reg(): write xPSR value
0x01000000
Debug: 1664 1196 armv7m.c:447 armv7m_write_core_reg(): write pc value
0x20000000
Debug: 1665 1197 armv7m.c:447 armv7m_write_core_reg(): write r2 value
0x00000100
Debug: 1666 1197 armv7m.c:447 armv7m_write_core_reg(): write r1 value
0x20000010
Debug: 1667 1198 armv7m.c:447 armv7m_write_core_reg(): write r0 value
0x08000000
Debug: 1668 1199 target.c:1834 target_call_event_callbacks(): target event
18 (debug-resumed) for core stm32l0.cpu
Debug: 1669 1199 cortex_m.c:954 cortex_m_resume(): target debug resumed at
0x20000000
Debug: 1670 1199 target.c:1834 target_call_event_callbacks(): target event
4 (resume-end) for core stm32l0.cpu
Debug: 1671 1199 cortex_m.c:741 cortex_m_halt(): target->state: unknown
Warn : 1672 1199 cortex_m.c:749 cortex_m_halt(): target was in unknown
state when halt was requested
Debug: 1673 1199 ftdi.c:1226 ftdi_swd_switch_seq(): JTAG-to-SWD
Info : 1674 1200 adi_v5_swd.c:148 swd_connect(): SWD DPIDR 0x0bc11477
Debug: 1675 1201 arm_adi_v5.c:653 dap_dp_init(): stm32l0.dap
Debug: 1676 1201 arm_adi_v5.c:685 dap_dp_init(): DAP: wait CDBGPWRUPACK
Debug: 1677 1201 arm_adi_v5.h:509 dap_dp_poll_register(): DAP: poll 4, mask
0x20000000, value 0x20000000
Debug: 1678 1202 ftdi.c:1226 ftdi_swd_switch_seq(): JTAG-to-SWD
Info : 1679 1203 adi_v5_swd.c:148 swd_connect(): SWD DPIDR 0x0bc11477
Debug: 1680 1203 arm_adi_v5.c:653 dap_dp_init(): stm32l0.dap
Debug: 1681 1203 arm_adi_v5.c:685 dap_dp_init(): DAP: wait CDBGPWRUPACK
Debug: 1682 1203 arm_adi_v5.h:509 dap_dp_poll_register(): DAP: poll 4, mask
0x20000000, value 0x20000000
Debug: 1683 1204 arm_adi_v5.c:693 dap_dp_init(): DAP: wait CSYSPWRUPACK
Debug: 1684 1204 arm_adi_v5.h:509 dap_dp_poll_register(): DAP: poll 4, mask
0x80000000, value 0x80000000
Debug: 1685 1206 target.c:2151 target_free_working_area_restore(): freed
1024 bytes of working area at address 0x20000010
...
== ST-LINK log (-d3) -- the first assembly code run
...
Debug: 2517 1078 hla_target.c:618 adapter_write_memory():
adapter_write_memory 0x40022010 4 1
Debug: 2518 1078 target.c:2690 target_write_u32(): address: 0x40022010,
value: 0x13141516
Debug: 2519 1078 hla_target.c:618 adapter_write_memory():
adapter_write_memory 0x40022010 4 1
Debug: 2520 1079 hla_target.c:603 adapter_read_memory():
adapter_read_memory 0x40022004 4 1
Debug: 2521 1079 target.c:2602 target_read_u32(): address: 0x40022004,
value: 0x00000004
Debug: 2522 1079 target.c:2028 target_alloc_working_area_try(): MMU
disabled, using physical address for working memory 0x20000000
Debug: 2523 1079 target.c:2082 target_alloc_working_area_try(): allocated
new working area of 16 bytes at address 0x20000000
Debug: 2524 1079 target.c:1949 print_wa_layout(): * 0x20000000-0x2000000f
(16 bytes)
Debug: 2525 1079 target.c:1949 print_wa_layout(): 0x20000010-0x200007ff
(2032 bytes)
Debug: 2526 1079 target.c:2387 target_write_buffer(): writing buffer of 16
byte at 0x20000000
Debug: 2527 1079 hla_target.c:618 adapter_write_memory():
adapter_write_memory 0x20000000 4 4
Debug: 2528 1080 target.c:2082 target_alloc_working_area_try(): allocated
new working area of 1024 bytes at address 0x20000010
Debug: 2529 1080 target.c:1949 print_wa_layout(): * 0x20000000-0x2000000f
(16 bytes)
Debug: 2530 1080 target.c:1949 print_wa_layout(): * 0x20000010-0x2000040f
(1024 bytes)
Debug: 2531 1080 target.c:1949 print_wa_layout(): 0x20000410-0x200007ff
(1008 bytes)
Debug: 2532 1080 hla_target.c:603 adapter_read_memory():
adapter_read_memory 0x40022004 4 1
Debug: 2533 1080 target.c:2602 target_read_u32(): address: 0x40022004,
value: 0x00000004
Debug: 2534 1080 hla_target.c:603 adapter_read_memory():
adapter_read_memory 0x40022004 4 1
Debug: 2535 1081 target.c:2602 target_read_u32(): address: 0x40022004,
value: 0x00000004
Debug: 2536 1081 target.c:2690 target_write_u32(): address: 0x40022004,
value: 0x00000404
Debug: 2537 1081 hla_target.c:618 adapter_write_memory():
adapter_write_memory 0x40022004 4 1
Debug: 2538 1081 hla_target.c:603 adapter_read_memory():
adapter_read_memory 0x40022004 4 1
Debug: 2539 1082 target.c:2602 target_read_u32(): address: 0x40022004,
value: 0x00000404
Debug: 2540 1082 target.c:2690 target_write_u32(): address: 0x40022004,
value: 0x0000040c
Debug: 2541 1082 hla_target.c:618 adapter_write_memory():
adapter_write_memory 0x40022004 4 1
Debug: 2542 1082 target.c:2387 target_write_buffer(): writing buffer of
1024 byte at 0x20000010
Debug: 2543 1082 hla_target.c:618 adapter_write_memory():
adapter_write_memory 0x20000010 4 256
Debug: 2544 1093 target.c:1834 target_call_event_callbacks(): target event
3 (resume-start) for core stm32l0.cpu
Debug: 2545 1093 hla_target.c:450 adapter_resume(): adapter_resume 0
0x20000000 1 1
Debug: 2546 1093 target.c:2690 target_write_u32(): address: 0xe000edfc,
value: 0x01000400
Debug: 2547 1093 hla_target.c:618 adapter_write_memory():
adapter_write_memory 0xe000edfc 4 1
Debug: 2548 1093 armv7m.c:183 armv7m_restore_context():
Debug: 2549 1094 armv7m.c:447 armv7m_write_core_reg(): write xPSR value
0x01000000
Debug: 2550 1095 armv7m.c:447 armv7m_write_core_reg(): write pc value
0x20000000
Debug: 2551 1095 armv7m.c:447 armv7m_write_core_reg(): write r2 value
0x00000100
Debug: 2552 1096 armv7m.c:447 armv7m_write_core_reg(): write r1 value
0x20000010
Debug: 2553 1097 armv7m.c:447 armv7m_write_core_reg(): write r0 value
0x08000000
Debug: 2554 1097 target.c:2690 target_write_u32(): address: 0xe000edf8,
value: 0xffffffff
Debug: 2555 1097 hla_target.c:618 adapter_write_memory():
adapter_write_memory 0xe000edf8 4 1
Debug: 2556 1098 target.c:1834 target_call_event_callbacks(): target event
18 (debug-resumed) for core stm32l0.cpu
Debug: 2557 1098 target.c:1834 target_call_event_callbacks(): target event
4 (resume-end) for core stm32l0.cpu
Debug: 2558 1099 stlink_usb.c:973 stlink_usb_error_check(): wait status
SWD_DP_WAIT (0x14)
Debug: 2559 1100 stlink_usb.c:1071 stlink_cmd_allow_retry():
stlink_cmd_allow_retry ERROR_WAIT, retry 1, delaying 1000 microseconds
Debug: 2560 1103 stlink_usb.c:973 stlink_usb_error_check(): wait status
SWD_DP_WAIT (0x14)
Debug: 2561 1103 stlink_usb.c:1071 stlink_cmd_allow_retry():
stlink_cmd_allow_retry ERROR_WAIT, retry 2, delaying 2000 microseconds
Debug: 2562 1107 stlink_usb.c:973 stlink_usb_error_check(): wait status
SWD_DP_WAIT (0x14)
Debug: 2563 1107 stlink_usb.c:1071 stlink_cmd_allow_retry():
stlink_cmd_allow_retry ERROR_WAIT, retry 3, delaying 4000 microseconds
Debug: 2564 1113 stlink_usb.c:973 stlink_usb_error_check(): wait status
SWD_DP_WAIT (0x14)
Debug: 2565 1113 stlink_usb.c:1071 stlink_cmd_allow_retry():
stlink_cmd_allow_retry ERROR_WAIT, retry 4, delaying 8000 microseconds
Debug: 2566 1123 stlink_usb.c:973 stlink_usb_error_check(): wait status
SWD_DP_WAIT (0x14)
Debug: 2567 1123 stlink_usb.c:1071 stlink_cmd_allow_retry():
stlink_cmd_allow_retry ERROR_WAIT, retry 5, delaying 16000 microseconds
Debug: 2568 1141 stlink_usb.c:973 stlink_usb_error_check(): wait status
SWD_DP_WAIT (0x14)
Debug: 2569 1141 stlink_usb.c:1071 stlink_cmd_allow_retry():
stlink_cmd_allow_retry ERROR_WAIT, retry 6, delaying 32000 microseconds
Debug: 2570 1173 hla_target.c:603 adapter_read_memory():
adapter_read_memory 0xe000edf8 4 1
Debug: 2571 1174 target.c:2602 target_read_u32(): address: 0xe000edf8,
value: 0x080003fc
Debug: 2572 1174 armv7m.c:377 armv7m_read_core_reg(): read r0 value
0x08000400
Debug: 2573 1175 armv7m.c:377 armv7m_read_core_reg(): read r1 value
0x20000410
...
--
wbr,
ReAl
