On 2021-06-20 14:12, Oleksandr Redchuk wrote:
нд, 20 черв. 2021 о 00:42 Andreas Bolsch <hyphen0br...@gmail.com> пише:

On 2021-06-19 22:58, Oleksandr Redchuk wrote:

> FT2232D-based adapter
> The same behavior as Ali Tekin reported:
> "Error: error writing to flash at address 0x08000000 at offset
> 0x00000000"
>> On 2021-06-17 14:51, ali tekin wrote:

Do you get this warning below, too? Could you post the cfg file?
>> > Warn : target was in unknown state when halt was requested

Yes, exactly the same.

Right, I get the same problem with an FT232 adapter on STM32L0538-Disco. So the problem is apparently not in the flash loader etc. but somewhere in the transport layer, as via STLink it works. And even with the FT232, the first run (exactly 7168 bytes) is written properly.

Debug: 994 76254 command.c:201 script_debug(): command - flash write_bank 0 main.bin Debug: 995 76254 command.c:201 script_debug(): command - flash write_bank 0 main.bin
Debug: 996 76254 configuration.c:99 find_file(): found main.bin
Debug: 997 76254 target.c:2600 target_read_u32(): address: 0x40022004, value: 0x00000007 Debug: 998 76254 target.c:2688 target_write_u32(): address: 0x4002200c, value: 0x89abcdef Debug: 999 76254 target.c:2688 target_write_u32(): address: 0x4002200c, value: 0x02030405 Debug: 1000 76254 target.c:2600 target_read_u32(): address: 0x40022004, value: 0x00000006 Debug: 1001 76254 target.c:2688 target_write_u32(): address: 0x40022010, value: 0x8c9daebf Debug: 1002 76254 target.c:2688 target_write_u32(): address: 0x40022010, value: 0x13141516 Debug: 1003 76255 target.c:2600 target_read_u32(): address: 0x40022004, value: 0x00000004 Debug: 1004 76255 target.c:2081 target_alloc_working_area_try(): allocated new working area of 16 bytes at address 0x20000000 Debug: 1005 76255 target.c:1947 print_wa_layout(): * 0x20000000-0x2000000f (16 bytes) Debug: 1006 76255 target.c:1947 print_wa_layout(): 0x20000010-0x20001fff (8176 bytes) Debug: 1007 76255 target.c:2386 target_write_buffer(): writing buffer of 16 byte at 0x20000000 Debug: 1008 76255 target.c:2081 target_alloc_working_area_try(): allocated new working area of 7168 bytes at address 0x20000010 Debug: 1009 76255 target.c:1947 print_wa_layout(): * 0x20000000-0x2000000f (16 bytes) Debug: 1010 76255 target.c:1947 print_wa_layout(): * 0x20000010-0x20001c0f (7168 bytes) Debug: 1011 76255 target.c:1947 print_wa_layout(): 0x20001c10-0x20001fff (1008 bytes) Debug: 1012 76255 target.c:2600 target_read_u32(): address: 0x40022004, value: 0x00000004 Debug: 1013 76255 target.c:2600 target_read_u32(): address: 0x40022004, value: 0x00000004 Debug: 1014 76255 target.c:2688 target_write_u32(): address: 0x40022004, value: 0x00000404 Debug: 1015 76255 target.c:2600 target_read_u32(): address: 0x40022004, value: 0x00000404 Debug: 1016 76255 target.c:2688 target_write_u32(): address: 0x40022004, value: 0x0000040c Debug: 1017 76255 target.c:2386 target_write_buffer(): writing buffer of 7168 byte at 0x20000010 Debug: 1018 76299 target.c:1832 target_call_event_callbacks(): target event 3 (resume-start) for core stm32l0.cpu
Debug: 1019 76299 armv7m.c:183 armv7m_restore_context():
Debug: 1020 76299 armv7m.c:447 armv7m_write_core_reg(): write pmsk_bpri_fltmsk_ctrl value 0x00000001 Debug: 1021 76299 armv7m.c:447 armv7m_write_core_reg(): write xPSR value 0x01000000 Debug: 1022 76299 armv7m.c:447 armv7m_write_core_reg(): write pc value 0x20000000 Debug: 1023 76299 armv7m.c:447 armv7m_write_core_reg(): write r4 value 0xffffffff Debug: 1024 76299 armv7m.c:447 armv7m_write_core_reg(): write r3 value 0xffffffff Debug: 1025 76300 armv7m.c:447 armv7m_write_core_reg(): write r2 value 0x00000700 Debug: 1026 76300 armv7m.c:447 armv7m_write_core_reg(): write r1 value 0x20000010 Debug: 1027 76300 armv7m.c:447 armv7m_write_core_reg(): write r0 value 0x08000000 Debug: 1028 76300 target.c:1832 target_call_event_callbacks(): target event 18 (debug-resumed) for core stm32l0.cpu Debug: 1029 76300 cortex_m.c:894 cortex_m_resume(): target debug resumed at 0x20000000 Debug: 1030 76300 target.c:1832 target_call_event_callbacks(): target event 4 (resume-end) for core stm32l0.cpu
Debug: 1031 76300 cortex_m.c:680 cortex_m_halt(): target->state: unknown
Warn : 1032 76300 cortex_m.c:689 cortex_m_halt(): target was in unknown state when halt was requested
Debug: 1033 76300 ftdi.c:1226 ftdi_swd_switch_seq(): JTAG-to-SWD
Info : 1034 76300 adi_v5_swd.c:148 swd_connect(): SWD DPIDR 0x0bc11477
Debug: 1035 76300 arm_adi_v5.c:653 dap_dp_init(): stm32l0.dap
Debug: 1036 76300 arm_adi_v5.c:685 dap_dp_init(): DAP: wait CDBGPWRUPACK
Debug: 1037 76300 arm_adi_v5.h:508 dap_dp_poll_register(): DAP: poll 4, mask 0x20000000, value 0x20000000

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