Approaching next v0.12.0, I wrote some crap script to compare the commands in OpenOCD code with those in doc/openocd.texi I would not bet on the correctness of my scripts, but the output is already helpful.
The first result is the short series I just pushed to gerrit, nothing really complex. But there are 170 commands that are not documented at all. You can find below the list. I plan to fix some of them, but 170 is way too much for me alone to dig in, manually verify and eventually update the documentation. Is there any volunteer to "randomly" pickup some of the commands below and patch the documentation? Or complain that my script is crap? Maybe you are already working on the code linked to one of the commands and it takes you just a few minutes to patch the doc too. In attachment there is a better log of the 170 commands that reuses all the info already in the code (help, usage, command_mode) to build an almost complete definition that could even be copy/paste in doc/openocd.texi, if you find where to paste it! Thanks, Antonio List of commands: stm8 enable_step_irq stm8 enable_stm8l arc cache auto arc cache l2 auto arc num-actionpoints riscv info riscv set_mem_access riscv test_sba_config_reg riscv reset_delays nds dssim nds mem_access nds mem_mode nds cache nds icache nds dcache nds auto_break nds virtual_hosting nds global_stop nds soft_reset_halt nds boot_time nds login_edm_passcode nds login_edm_operation nds reset_halt_as_init nds keep_target_edm_ctl nds decode nds word_access_mem nds bulk_write nds multi_write nds bulk_read nds read_edmsr nds write_edmsr nds query target nds query endian nds query cpuid tap_list du_list catch_exc aarch64 mcr aarch64 mrc aarch64 smp_gdb mips64mode32 mwwx mwwy mwwp mdwx mdwy mdwp wpp wpx wpy rwpc arm11 hardware_step arm946e cp15 arm946e icache arm946e dcache tpiu config testee hello testee foo bar testee foo baz testee foo flag tpiu config cache auto cache l1 info cache l1 d flush_all cache l1 d inval cache l1 d clean cache l1 i inval_all cache l1 i inval cache l2x conf cache l2x info cache l2x flush_all cache l2x flush cache l2x inval cache l2x clean mips32 cp0 mips32 scan_delay mips_m4k cp0 mips_m4k scan_delay mips_m4k smp mips_m4k smp_gdb transport init lpc32xx select hello foo bar foo baz foo flag nand drivers nand init flash fillw flash fillh flash fillb flash mdb flash mdh stm32l4x trustzone atsamv gpnvm numicro read_isp numicro write_isp numicro chip_erase jtagspi set jtagspi cmd jtagspi always_4byte avrf mass_erase em357 lock em357 unlock em357 mass_erase max32xxx mass_erase max32xxx protection_set max32xxx protection_clr max32xxx protection_check fm3 chip_erase at91sam4 gpnvm at91sam4 info at91sam4 slowclk kinetis_ke mdm test_securing at91samd info stellaris mass_erase faux hello faux foo bar faux foo baz faux foo flag efm32 debuglock nrf51 mass_erase nrf51 info nrf51 mass_erase nrf51 info niietcm4 extmem_boot flash init ms ocd_find capture add_help_text add_usage_text usage command mode noinit init expr jsp_port swo create swo names swo init jtag init jtag configure target init target smp wait_halt mdw mdh mdb mww mwh mwb mem2array array2mem reset_nag ps test_mem_access aice info aice port aice desc aice serial aice vid_pid aice adapter aice retry_times aice count_to_check_dbger aice custom_srst_script aice custom_trst_script aice custom_restart_script aice reset cmsis-dap cmd
@deffn {Command} {stm8 enable_step_irq} [1/0] Enable/disable irq handling during step @end deffn @deffn {Command} {stm8 enable_stm8l} [1/0] Enable/disable STM8L flash programming @end deffn @deffn {Command} {arc cache auto} (1|0) Disable or enable L1 @end deffn @deffn {Command} {arc cache l2 auto} (1|0) Disable or enable L2 @end deffn @deffn {Command} {arc num-actionpoints} [<unsigned integer>] Prints or sets amount of actionpoints in the processor. @end deffn @deffn {Command} {riscv info} Displays some information OpenOCD detected about the target. @end deffn @deffn {Command} {riscv set_mem_access} method1 [method2] [method3] Set which memory access methods shall be used and in which order of priority. Method can be one of: 'progbuf', 'sysbus' or 'abstract'. @end deffn @deffn {Command} {riscv test_sba_config_reg} legal_address num_words illegal_address run_sbbusyerror_test[on/off] Perform a series of tests on the SBCS register. Inputs are a legal, 128-byte aligned address and a number of words to read/write starting at that address (i.e., address range [legal address, legal_address+word_size*num_words) must be legally readable/writable), an illegal, 128-byte aligned address for error flag/handling cases, and whether sbbusyerror test should be run. @end deffn @deffn {Command} {riscv reset_delays} [wait] OpenOCD learns how many Run-Test/Idle cycles are required between scans to avoid encountering the target being busy. This command resets those learned values after `wait` scans. It's only useful for testing OpenOCD itself. @end deffn @deffn {Command} {nds dssim} ['on'|'off'] display/change $INT_MASK.DSSIM status @end deffn @deffn {Command} {nds mem_access} ['bus'|'cpu'] display/change memory access channel @end deffn @deffn {Command} {nds mem_mode} ['auto'|'mem'|'ilm'|'dlm'] display/change memory mode @end deffn @deffn {Command} {nds cache} ['invalidate'] cache control @end deffn @deffn {Command} {nds icache} ['invalidate'|'enable'|'disable'|'dump'] icache control @end deffn @deffn {Command} {nds dcache} ['invalidate'|'enable'|'disable'|'dump'] dcache control @end deffn @deffn {Command} {nds auto_break} ['on'|'off'] convert software breakpoints to hardware breakpoints if needed @end deffn @deffn {Command} {nds virtual_hosting} ['on'|'off'] turn on/off virtual hosting @end deffn @deffn {Command} {nds global_stop} ['on'|'off'] turn on/off global stop. After turning on, every load/store instructions will be stopped to check memory access. @end deffn @deffn {Command} {nds soft_reset_halt} ['on'|'off'] as issuing rest-halt, to use soft-reset-halt or not.the feature is for backward-compatible. @end deffn @deffn {Config Command} {nds boot_time} milliseconds set the period to wait after srst. @end deffn @deffn {Config Command} {nds login_edm_passcode} passcode set EDM passcode for secure MCU debugging. @end deffn @deffn {Config Command} {nds login_edm_operation} misc_reg_no value add EDM operations for secure MCU debugging. @end deffn @deffn {Config Command} {nds reset_halt_as_init} ['on'|'off'] reset halt as openocd init. @end deffn @deffn {Config Command} {nds keep_target_edm_ctl} ['on'|'off'] Backup/Restore target EDM_CTL register. @end deffn @deffn {Command} {nds decode} address icount decode instruction. @end deffn @deffn {Command} {nds word_access_mem} ['on'|'off'] Always use word-aligned address to access memory. @end deffn @deffn {Command} {nds bulk_write} address count data Write multiple 32-bit words to target memory @end deffn @deffn {Command} {nds multi_write} num_of_pairs [address data]+ Write multiple addresses/words to target memory @end deffn @deffn {Command} {nds bulk_read} address count Read multiple 32-bit words from target memory @end deffn @deffn {Command} {nds read_edmsr} ['edmsw'|'edm_dtr'] Read EDM system register @end deffn @deffn {Command} {nds write_edmsr} ['edm_dtr'] value Write EDM system register @end deffn @deffn {Command} {nds query target} reply 'OCD' for gdb to identify server-side is OpenOCD @end deffn @deffn {Command} {nds query endian} query target endian @end deffn @deffn {Command} {nds query cpuid} query CPU ID @end deffn @deffn {Command} {tap_list} Display available TAP core @end deffn @deffn {Command} {du_list} select_tap name Display available Debug Unit core @end deffn @deffn {Command} {catch_exc} [(nsec_el1,nsec_el2,sec_el1,sec_el3)+,off] configure exception catch @end deffn @deffn {Command} {aarch64 mcr} cpnum op1 CRn CRm op2 value write coprocessor register @end deffn @deffn {Command} {aarch64 mrc} cpnum op1 CRn CRm op2 read coprocessor register @end deffn @deffn {Command} {aarch64 smp_gdb} display/fix current core played to gdb @end deffn @deffn {Command} {mips64mode32} [1|0] Enable/disable 32 bit mode @end deffn @deffn {Command} {mwwx} address value [count] write x memory words @end deffn @deffn {Command} {mwwy} address value [count] write y memory words @end deffn @deffn {Command} {mwwp} address value [count] write p memory words @end deffn @deffn {Command} {mdwx} address [count] display x memory words @end deffn @deffn {Command} {mdwy} address [count] display y memory words @end deffn @deffn {Command} {mdwp} address [count] display p memory words @end deffn @deffn {Command} {wpp} (>|<|=|!) (r|w|a) address Create p memspace watchpoint @end deffn @deffn {Command} {wpx} (>|<|=|!) (r|w|a) address Create x memspace watchpoint @end deffn @deffn {Command} {wpy} (>|<|=|!) (r|w|a) address Create y memspace watchpoint @end deffn @deffn {Command} {rwpc} remove watchpoint custom @end deffn @deffn {Command} {arm11 hardware_step} ['enable'|'disable'] DEBUG ONLY - Hardware single stepping (default: disabled) @end deffn @deffn {Command} {arm946e cp15} regnum [value] read/modify cp15 register @end deffn @deffn {Command} {arm946e icache} ['enable'|'disable'|'flush'] I-cache info and operations @end deffn @deffn {Command} {arm946e dcache} ['enable'|'disable'|'flush'] D-cache info and operations @end deffn @deffn {Command} {tpiu config} (disable | ((external | internal (<filename> | <:port> | -)) (sync <port width> | ((manchester | uart) <formatter enable>)) <TRACECLKIN freq> [<trace freq>])) Configure TPIU features, DEPRECATED, use 'tpiu create' @end deffn @deffn {Command} {testee hello} [name] prints a warm welcome @end deffn @deffn {Command} {testee foo bar} address ['enable'|'disable'] an example command @end deffn @deffn {Command} {testee foo baz} address ['enable'|'disable'] a sample command @end deffn @deffn {Command} {testee foo flag} [on|off] set a flag @end deffn @deffn {Command} {tpiu config} (disable | ((external | internal (<filename> | <:port> | -)) (sync <port width> | ((manchester | uart) <formatter enable>)) <TRACECLKIN freq> [<trace freq>])) Configure TPIU features, DEPRECATED, use 'tpiu create' @end deffn @deffn {Command} {cache auto} (1|0) disable or enable automatic cache handling. @end deffn @deffn {Command} {cache l1 info} print cache related information @end deffn @deffn {Command} {cache l1 d flush_all} flush (clean and invalidate) complete l1 d-cache @end deffn @deffn {Command} {cache l1 d inval} <virt_addr> [size] invalidate l1 d-cache by virtual address offset and range size @end deffn @deffn {Command} {cache l1 d clean} <virt_addr> [size] clean l1 d-cache by virtual address address offset and range size @end deffn @deffn {Command} {cache l1 i inval_all} invalidate complete l1 i-cache @end deffn @deffn {Command} {cache l1 i inval} <virt_addr> [size] invalidate l1 i-cache by virtual address offset and range size @end deffn @deffn {Command} {cache l2x conf} <base_addr> <number_of_way> configure l2x cache @end deffn @deffn {Command} {cache l2x info} print cache related information @end deffn @deffn {Command} {cache l2x flush_all} flush complete l2x cache @end deffn @deffn {Command} {cache l2x flush} <virt_addr> [size] flush (clean and invalidate) l2x cache by virtual address offset and range size @end deffn @deffn {Command} {cache l2x inval} <virt_addr> [size] invalidate l2x cache by virtual address offset and range size @end deffn @deffn {Command} {cache l2x clean} <virt_addr> [size] clean l2x cache by virtual address address offset and range size @end deffn @deffn {Command} {mips32 cp0} regnum select [value] display/modify cp0 register @end deffn @deffn {Command} {mips32 scan_delay} [value] display/set scan delay in nano seconds @end deffn @deffn {Command} {mips_m4k cp0} regnum [value] display/modify cp0 register @end deffn @deffn {Command} {mips_m4k scan_delay} [value] display/set scan delay in nano seconds @end deffn @deffn {Command} {mips_m4k smp} [on|off] smp handling @end deffn @deffn {Command} {mips_m4k smp_gdb} display/fix current core played to gdb @end deffn @deffn {Command} {transport init} Initialize this session's transport @end deffn @deffn {Command} {lpc32xx select} bank_id ['mlc'|'slc' ] select MLC or SLC controller (default is MLC) @end deffn @deffn {Command} {hello} [name] prints a warm welcome @end deffn @deffn {Command} {foo bar} address ['enable'|'disable'] an example command @end deffn @deffn {Command} {foo baz} address ['enable'|'disable'] a sample command @end deffn @deffn {Command} {foo flag} [on|off] set a flag @end deffn @deffn {Command} {nand drivers} lists available NAND drivers @end deffn @deffn {Config Command} {nand init} initialize NAND devices @end deffn @deffn {Command} {flash fillw} address value n Fill n words with 32-bit value, starting at word address. (No autoerase.) @end deffn @deffn {Command} {flash fillh} address value n Fill n halfwords with 16-bit value, starting at word address. (No autoerase.) @end deffn @deffn {Command} {flash fillb} address value n Fill n bytes with 8-bit value, starting at word address. (No autoerase.) @end deffn @deffn {Command} {flash mdb} address [count] Display bytes from flash. @end deffn @deffn {Command} {flash mdh} address [count] Display half-words from flash. @end deffn @deffn {Command} {stm32l4x trustzone} <bank_id> [enable|disable] Configure TrustZone security @end deffn @deffn {Command} {atsamv gpnvm} [('clr'|'set'|'show') bitnum] Without arguments, shows all bits in the gpnvm register. Otherwise, clears, sets, or shows one General Purpose Non-Volatile Memory (gpnvm) bit. @end deffn @deffn {Command} {numicro read_isp} address read flash through ISP. @end deffn @deffn {Command} {numicro write_isp} address value write flash through ISP. @end deffn @deffn {Command} {numicro chip_erase} chip erase through ISP. @end deffn @deffn {Command} {jtagspi set} bank_id name chip_size page_size read_cmd unused pprg_cmd [ mass_erase_cmd ] [ sector_size sector_erase_cmd ] Set device parameters if not autodetected. @end deffn @deffn {Command} {jtagspi cmd} bank_id num_resp cmd_byte ... Send low-level command cmd_byte and following bytes, read num_bytes. @end deffn @deffn {Command} {jtagspi always_4byte} bank_id [ on | off ] Use always 4-byte address except for basic 0x03. @end deffn @deffn {Command} {avrf mass_erase} <bank> erase entire device @end deffn @deffn {Command} {em357 lock} <bank> Lock entire flash device. @end deffn @deffn {Command} {em357 unlock} <bank> Unlock entire protected flash device. @end deffn @deffn {Command} {em357 mass_erase} <bank> Erase entire flash device. @end deffn @deffn {Command} {max32xxx mass_erase} bank_id mass erase flash @end deffn @deffn {Command} {max32xxx protection_set} bank_id addr size set flash protection for address range @end deffn @deffn {Command} {max32xxx protection_clr} bank_id addr size clear flash protection for address range @end deffn @deffn {Command} {max32xxx protection_check} bank_id check flash protection @end deffn @deffn {Command} {fm3 chip_erase} <bank> Erase entire Flash device. @end deffn @deffn {Command} {at91sam4 gpnvm} [('clr'|'set'|'show') bitnum] Without arguments, shows all bits in the gpnvm register. Otherwise, clears, sets, or shows one General Purpose Non-Volatile Memory (gpnvm) bit. @end deffn @deffn {Command} {at91sam4 info} Print information about the current at91sam4 chip and its flash configuration. @end deffn @deffn {Command} {at91sam4 slowclk} [clock_hz] Display or set the slowclock frequency (default 32768 Hz). @end deffn @deffn {Command} {kinetis_ke mdm test_securing} @end deffn @deffn {Command} {at91samd info} Print information about the current at91samd chip and its flash configuration. @end deffn @deffn {Command} {stellaris mass_erase} <bank> erase entire device @end deffn @deffn {Command} {faux hello} [name] prints a warm welcome @end deffn @deffn {Command} {faux foo bar} address ['enable'|'disable'] an example command @end deffn @deffn {Command} {faux foo baz} address ['enable'|'disable'] a sample command @end deffn @deffn {Command} {faux foo flag} [on|off] set a flag @end deffn @deffn {Command} {efm32 debuglock} bank_id Lock the debug interface of the device. @end deffn @deffn {Command} {nrf51 mass_erase} Erase all flash contents of the chip. @end deffn @deffn {Command} {nrf51 info} Show FICR and UICR info. @end deffn @deffn {Command} {nrf51 mass_erase} Erase all flash contents of the chip. @end deffn @deffn {Command} {nrf51 info} Show FICR and UICR info. @end deffn @deffn {Command} {niietcm4 extmem_boot} bank_id ('on'|'off') Enable boot from external memory. @end deffn @deffn {Config Command} {flash init} Initialize flash devices. @end deffn @deffn {Command} {ms} Returns ever increasing milliseconds. Used to calculate differences in time. @end deffn @deffn {Command} {ocd_find} file find full path to file @end deffn @deffn {Command} {capture} command Capture progress output and return as tcl return value. If the progress output was empty, return tcl return value. @end deffn @deffn {Command} {add_help_text} command_name helptext_string Add new command help text; Command can be multiple tokens. @end deffn @deffn {Command} {add_usage_text} command_name usage_string Add new command usage text; command can be multiple tokens. @end deffn @deffn {Command} {usage} [command_name] Show basic command usage; command can be multiple tokens. @end deffn @deffn {Command} {command mode} [command_name ...] Returns the command modes allowed by a command: 'any', 'config', or 'exec'. If no command is specified, returns the current command mode. Returns 'unknown' if an unknown command is given. Command can be multiple tokens. @end deffn @deffn {Config Command} {noinit} Prevent 'init' from being called at startup. @end deffn @deffn {Command} {init} Initializes configured targets and servers. Changes command mode from CONFIG to EXEC. Unless 'noinit' is called, this command is called automatically at the end of startup. @end deffn @deffn {Command} {expr} @end deffn @deffn {Command} {jsp_port} [port_num] Specify port on which to listen for incoming JSP telnet connections. @end deffn @deffn {Command} {swo create} name [-dap dap] [-ap-num num] [-address baseaddr] Creates a new TPIU or SWO object @end deffn @deffn {Command} {swo names} Lists all registered TPIU and SWO objects by name @end deffn @deffn {Command} {swo init} Initialize TPIU and SWO @end deffn @deffn {Command} {jtag init} No help available @end deffn @deffn {Command} {jtag configure} No help available @end deffn @deffn {Config Command} {target init} initialize targets @end deffn @deffn {Command} {target smp} targetname1 targetname2 ... gather several target in a smp list @end deffn @deffn {Command} {wait_halt} [milliseconds] wait up to the specified number of milliseconds (default 5000) for a previously requested halt @end deffn @deffn {Command} {mdw} ['phys'] address [count] display memory words @end deffn @deffn {Command} {mdh} ['phys'] address [count] display memory half-words @end deffn @deffn {Command} {mdb} ['phys'] address [count] display memory bytes @end deffn @deffn {Command} {mww} ['phys'] address value [count] write memory word @end deffn @deffn {Command} {mwh} ['phys'] address value [count] write memory half-word @end deffn @deffn {Command} {mwb} ['phys'] address value [count] write memory byte @end deffn @deffn {Command} {mem2array} arrayname bitwidth address count read 8/16/32 bit memory and return as a TCL array for script processing @end deffn @deffn {Command} {array2mem} arrayname bitwidth address count convert a TCL array to memory locations and write the 8/16/32 bit values @end deffn @deffn {Command} {reset_nag} ['enable'|'disable'] Nag after each reset about options that could have been enabled to improve performance. @end deffn @deffn {Command} {ps} list all tasks @end deffn @deffn {Command} {test_mem_access} size Test the target's memory access functions @end deffn @deffn {Command} {aice info} show aice info @end deffn @deffn {Config Command} {aice port} ['aice_pipe'|'aice_usb'] set the port of the AICE @end deffn @deffn {Config Command} {aice desc} [description string] set the aice device description @end deffn @deffn {Config Command} {aice serial} [serial string] set the serial number of the AICE device @end deffn @deffn {Config Command} {aice vid_pid} (vid pid)* the vendor and product ID of the AICE device @end deffn @deffn {Config Command} {aice adapter} [adapter name] set the file name of adapter @end deffn @deffn {Config Command} {aice retry_times} num_of_retry set retry times as AICE timeout @end deffn @deffn {Config Command} {aice count_to_check_dbger} count_of_checking set retry times as checking $DBGER status @end deffn @deffn {Config Command} {aice custom_srst_script} script_file_name set custom srst script @end deffn @deffn {Config Command} {aice custom_trst_script} script_file_name set custom trst script @end deffn @deffn {Config Command} {aice custom_restart_script} script_file_name set custom restart script @end deffn @deffn {Command} {aice reset} reset AICE @end deffn @deffn {Command} {cmsis-dap cmd} issue cmsis-dap command @end deffn