This is an automated email from Gerrit.
"Michael Schwingen <mich...@schwingen.org>" just uploaded a new patch set to
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/6733
-- gerrit
commit 96b42ea95d30c7ee0ea8621d036df8ac19f81586
Author: Michael Schwingen <mich...@schwingen.org>
Date: Sun Nov 21 19:15:26 2021 +0100
quick hack: add MindMotion MM32L062 support
This is a quick hack, since there is no clean way to distinguish the
MM32L062 from ST parts - the core is the same, but the device ID register is in
a different place.
I can erase and program the part using this patch.
Getting this merged will require additional work in the STM32F1x framework.
Change-Id: I5e53182b8fd29c07a58f459fcc54a22ba2bbb62b
Signed-off-by: Michael Schwingen <mich...@schwingen.org>
diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c
index 6744779e9..071c1b4cb 100644
--- a/src/flash/nor/stm32f1x.c
+++ b/src/flash/nor/stm32f1x.c
@@ -653,6 +653,12 @@ static int stm32x_get_device_id(struct flash_bank *bank,
uint32_t *device_id)
if (retval != ERROR_OK)
return retval;
+ if (*device_id == 0) { // try alternate address used by MM32L062
+ retval = target_read_u32(target, 0x40013400, device_id);
+ if (retval != ERROR_OK)
+ return retval;
+ }
+
return retval;
}
@@ -855,6 +861,11 @@ static int stm32x_probe(struct flash_bank *bank)
stm32x_info->default_rdp = 0xAA;
stm32x_info->can_load_options = true;
break;
+ case 0x091: /* 0xcc568091: MM32L062 */
+ page_size = 1024;
+ stm32x_info->ppage_size = 4;
+ max_flash_size_in_kb = 128;
+ break;
default:
LOG_WARNING("Cannot identify target as a STM32 family.");
return ERROR_FAIL;
@@ -1187,6 +1198,10 @@ static int get_stm32x_info(struct flash_bank *bank,
struct command_invocation *c
rev_str = get_stm32f0_revision(rev_id);
break;
+ case 0x091:
+ device_str = "MM32L062";
+ break;
+
default:
command_print_sameline(cmd, "Cannot identify target as a
STM32F0/1/3\n");
return ERROR_FAIL;
diff --git a/tcl/board/led_nametag_tbd_1144.cfg
b/tcl/board/led_nametag_tbd_1144.cfg
new file mode 100644
index 000000000..bebfd8cba
--- /dev/null
+++ b/tcl/board/led_nametag_tbd_1144.cfg
@@ -0,0 +1,10 @@
+# LED Nametag TBD-1144-GDV1, with a MM32L062 MCU
+source [find interface/stlink.cfg]
+
+transport select hla_swd
+
+source [find target/mm32l0x.cfg]
+
+reset_config srst_only
+reset_config srst_nogate
+reset_config connect_assert_srst
diff --git a/tcl/target/mm32l0x.cfg b/tcl/target/mm32l0x.cfg
new file mode 100644
index 000000000..9f6881d51
--- /dev/null
+++ b/tcl/target/mm32l0x.cfg
@@ -0,0 +1,61 @@
+# script for MM32L0x family
+
+#
+# MM32 devices support SWD transports only.
+#
+source [find target/swj-dp.tcl]
+source [find mem_helper.tcl]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME mm32l0x
+}
+
+# Work-area is a space in RAM used for flash programming
+# By default use 4kB
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x1000
+}
+
+# Allow overriding the Flash bank size
+if { [info exists FLASH_SIZE] } {
+ set _FLASH_SIZE $FLASH_SIZE
+} else {
+ # autodetect size
+ set _FLASH_SIZE 0
+}
+
+#jtag scan chain
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x0bb11477
+}
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id
$_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size
$_WORKAREASIZE -work-area-backup 0
+
+# flash size will be probed
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME stm32f1x 0x08000000 $_FLASH_SIZE 0 0 $_TARGETNAME
+
+# SWD speed limit is unknown - use a safe value
+adapter speed 1000
+
+adapter srst delay 100
+
+reset_config srst_nogate
+
+if {![using_hla]} {
+ # if srst is not fitted use SYSRESETREQ to
+ # perform a soft reset
+ cortex_m reset_config sysresetreq
+}
--
