This is an automated email from Gerrit. "Tomas Vanek <van...@fbl.cz>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/6999
-- gerrit commit 827e15cef3271848efb4594d88604fa47938dbb6 Author: Tomas Vanek <van...@fbl.cz> Date: Thu May 26 11:33:27 2022 +0200 target/riscv: add common magic Add common_magic member to struct riscv_info. Introduce is_riscv() helper. Change-Id: I1af05988ad869342ba5dc6d4d0ba0ec6a8bf7bc7 Signed-off-by: Tomas Vanek <van...@fbl.cz> diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 84f1ca7294..1b592a9d17 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -3203,6 +3203,9 @@ struct target_type riscv_target = { void riscv_info_init(struct target *target, struct riscv_info *r) { memset(r, 0, sizeof(*r)); + + r->common_magic = RISCV_COMMON_MAGIC; + r->dtm_version = 1; r->registers_initialized = false; r->current_hartid = target->coreid; diff --git a/src/target/riscv/riscv.h b/src/target/riscv/riscv.h index 40a46b4131..cff1c10e86 100644 --- a/src/target/riscv/riscv.h +++ b/src/target/riscv/riscv.h @@ -12,6 +12,8 @@ struct riscv_program; #include "target/register.h" #include <helper/command.h> +#define RISCV_COMMON_MAGIC 0x52495356U + /* The register cache is statically allocated. */ #define RISCV_MAX_HARTS 1024 #define RISCV_MAX_REGISTERS 5000 @@ -85,6 +87,8 @@ typedef struct { } range_list_t; struct riscv_info { + unsigned int common_magic; + unsigned dtm_version; struct command_context *cmd_ctx; @@ -271,6 +275,11 @@ static inline struct riscv_info *riscv_info(const struct target *target) } #define RISCV_INFO(R) struct riscv_info *R = riscv_info(target); +static inline bool is_riscv(const struct riscv_info *riscv_info) +{ + return riscv_info->common_magic == RISCV_COMMON_MAGIC; +} + extern uint8_t ir_dtmcontrol[4]; extern struct scan_field select_dtmcontrol; extern uint8_t ir_dbus[4]; --