This is an automated email from Gerrit.
"Tomas Vanek <van...@fbl.cz>" just uploaded a new patch set to Gerrit, which
you can find at https://review.openocd.org/c/openocd/+/7002
-- gerrit
commit a438d3fc1087267449efa85376cba9fdf0a61ab6
Author: Tomas Vanek <van...@fbl.cz>
Date: Thu May 26 15:30:06 2022 +0200
doc: add a remark to SW-DP adapter speed vs CPU speed
While on it, correct upper and lower case in frequency units (kHz and MHz).
Change-Id: Id8875a5f86220dd2456200460bd68956f4f99f73
Signed-off-by: Tomas Vanek <van...@fbl.cz>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index cc1d104411..509cca7ac0 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -3789,7 +3789,7 @@ instead of @command{adapter speed}, but only for (ARM)
cores and boards
which support adaptive clocking.
@deffn {Command} {adapter speed} max_speed_kHz
-A non-zero speed is in KHZ. Hence: 3000 is 3mhz.
+A non-zero speed is in kHz. Hence: 3000 is 3 MHz.
JTAG interfaces usually support a limited number of
speeds. The speed actually used won't be faster
than the speed specified.
@@ -3797,7 +3797,9 @@ than the speed specified.
Chip data sheets generally include a top JTAG clock rate.
The actual rate is often a function of a CPU core clock,
and is normally less than that peak rate.
-For example, most ARM cores accept at most one sixth of the CPU clock.
+For example, most ARM cores accept JTAG clock at most one sixth of the CPU
clock.
+Note SW-DP circuitry is often self-clocked and the SWD clock
+can go up to 10 times the CPU clock.
Speed 0 (khz) selects RTCK method.
@xref{faqrtck,,FAQ RTCK}.
@@ -3815,7 +3817,7 @@ This Tcl proc (defined in @file{startup.tcl}) attempts to
enable RTCK/RCLK.
If that fails (maybe the interface, board, or target doesn't
support it), falls back to the specified frequency.
@example
-# Fall back to 3mhz if RTCK is not supported
+# Fall back to 3 MHz if RTCK is not supported
jtag_rclk 3000
@end example
@end defun
--
