This is an automated email from Gerrit. "Erhan Kurubas <erhan.kuru...@espressif.com>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/7036
-- gerrit commit 0e65dd0d6bd439dd9e66f565ee86984d88cda4dc Author: Erhan Kurubas <erhan.kuru...@espressif.com> Date: Sat Jun 18 23:01:28 2022 +0200 tcl/esp32s2: check memory protection on gdb attach Memory protection must be disabled to allow stub flasher operate correctly. Signed-off-by: Erhan Kurubas <erhan.kuru...@espressif.com> Change-Id: I2f239d98fca6882c4361691af306a5652b58ee78 diff --git a/tcl/target/esp32s2.cfg b/tcl/target/esp32s2.cfg index ab64c31358..331279e5d3 100644 --- a/tcl/target/esp32s2.cfg +++ b/tcl/target/esp32s2.cfg @@ -3,6 +3,11 @@ # The ESP32-S2 only supports JTAG. transport select jtag +set CPU_MAX_ADDRESS 0xFFFFFFFF +source [find bitsbytes.tcl] +source [find memory.tcl] +source [find mmr_helpers.tcl] + if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME } else { @@ -21,8 +26,38 @@ set _TAPNAME $_CHIPNAME.$_CPUNAME jtag newtap $_CHIPNAME $_CPUNAME -irlen 5 -expected-id $_CPUTAPID +proc esp32s2_memprot_is_enabled { } { + # IRAM0, DPORT_PMS_PRO_IRAM0_0_REG + if { [get_mmr_bit 0x3f4c1010 0] != 0 } { + return 1 + } + # DRAM0, DPORT_PMS_PRO_DRAM0_0_REG + if { [get_mmr_bit 0x3f4c1028 0] != 0 } { + return 1 + } + # PERI1, DPORT_PMS_PRO_DPORT_0_REG + if { [get_mmr_bit 0x3f4c103c 0] != 0 } { + return 1 + } + # PERI2, DPORT_PMS_PRO_AHB_0_REG + if { [get_mmr_bit 0x3f4c105c 0] != 0 } { + return 1 + } + return 0 +} + target create $_TARGETNAME esp32s2 -endian little -chain-position $_TAPNAME +$_TARGETNAME configure -event gdb-attach { + # necessary to auto-probe flash bank when GDB is connected + halt 1000 + if { [esp32s2_memprot_is_enabled] } { + # 'reset halt' to disable memory protection and allow flasher to work correctly + echo "Memory protection is enabled. Reset target to disable it..." + reset halt + } +} + xtensa maskisr on $_TARGETNAME configure -event reset-assert-post { soft_reset_halt } --