[PATCH]: f1bd441e5d target/xtensa: fully initialize buffers for PWRSTAT read

[gerrit]

This is an automated email from Gerrit.

"Ian Thompson <ia...@cadence.com>" just uploaded a new patch set to Gerrit, 
which you can find at https://review.openocd.org/c/openocd/+/7183

-- gerrit

commit f1bd441e5d3701e9523a34ca866a2abe78417377
Author: Ian Thompson <ia...@cadence.com>
Date:   Fri Sep 9 12:10:20 2022 -0700

    target/xtensa: fully initialize buffers for PWRSTAT read
    
    Read buffer is sized for 32-bit APB version of PWRSTAT/PWRCTL registers. 
Initialize to zero so 8-bit JTAG register mirrors are accurate.
    
    Signed-off-by: Ian Thompson <ia...@cadence.com>
    Change-Id: I81310649fa7180893d0188aab3c8a14315aaea0a

diff --git a/src/target/xtensa/xtensa_debug_module.c 
b/src/target/xtensa/xtensa_debug_module.c
index 7f8a75bc66..e0558d3e16 100644
--- a/src/target/xtensa/xtensa_debug_module.c
+++ b/src/target/xtensa/xtensa_debug_module.c
@@ -150,8 +150,8 @@ int xtensa_dm_device_id_read(struct xtensa_debug_module *dm)
 
 int xtensa_dm_power_status_read(struct xtensa_debug_module *dm, uint32_t clear)
 {
-       uint8_t stat_buf[sizeof(uint32_t)];
-       uint8_t stath_buf[sizeof(uint32_t)];
+       uint8_t stat_buf[sizeof(uint32_t)] = { 0, 0, 0, 0 };
+       uint8_t stath_buf[sizeof(uint32_t)] = { 0, 0, 0, 0 };
 
        /* TODO: JTAG does not work when PWRCTL_JTAGDEBUGUSE is not set.
         * It is set in xtensa_examine(), need to move reading of XDMREG_OCDID 
out of this function */

--