[PATCH]: ed7c270923 target/cortex_m: try to re-examine under reset in cortex_m_assert_reset()

[gerrit]

This is an automated email from Gerrit.

"Tomas Vanek <van...@fbl.cz>" just uploaded a new patch set to Gerrit, which 
you can find at https://review.openocd.org/c/openocd/+/7228

-- gerrit

commit ed7c270923d45096a5a8b3b3d72ccb33a7c562db
Author: Tomas Vanek <van...@fbl.cz>
Date:   Wed Sep 28 23:01:39 2022 +0200

    target/cortex_m: try to re-examine under reset in cortex_m_assert_reset()
    
    An application often idling in real sleep mode may make a Cortex-M target
    hard to access as CPU clock are gated and debug requests are responded
    by WAIT ack.
    
    Try to examine the target under reset as the last resort.
    
    Change-Id: Ife875a966a838c37dde987bc584ad0a1f4d020d6
    Signed-off-by: Tomas Vanek <van...@fbl.cz>

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 23d9065e2a..686365a79f 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -1428,11 +1428,26 @@ static int cortex_m_assert_reset(struct target *target)
 
        bool srst_asserted = false;
 
+       if ((jtag_reset_config & RESET_HAS_SRST) &&
+           ((jtag_reset_config & RESET_SRST_NO_GATING) || 
!target_was_examined(target))) {
+               adapter_assert_reset();
+               srst_asserted = true;
+       }
+
+       if (!target_was_examined(target) && srst_asserted
+               && (jtag_reset_config & RESET_SRST_NO_GATING)) {
+               LOG_TARGET_DEBUG(target, "Trying to re-examine under reset");
+               target_examine_one(target);
+       }
+
        if (!target_was_examined(target)) {
-               if (jtag_reset_config & RESET_HAS_SRST) {
-                       adapter_assert_reset();
+               if (srst_asserted) {
                        if (target->reset_halt)
                                LOG_TARGET_ERROR(target, "Target not examined, 
will not halt after reset!");
+
+                       /* Do not propagate error: reset was asserted, proceed 
to deassert! */
+                       target->state = TARGET_RESET;
+                       
register_cache_invalidate(cortex_m->armv7m.arm.core_cache);
                        return ERROR_OK;
                } else {
                        LOG_TARGET_ERROR(target, "Target not examined, reset 
NOT asserted!");
@@ -1440,12 +1455,6 @@ static int cortex_m_assert_reset(struct target *target)
                }
        }
 
-       if ((jtag_reset_config & RESET_HAS_SRST) &&
-           (jtag_reset_config & RESET_SRST_NO_GATING)) {
-               adapter_assert_reset();
-               srst_asserted = true;
-       }
-
        /* Enable debug requests */
        int retval = cortex_m_read_dhcsr_atomic_sticky(target);
 

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