[PATCH]: 64037ecb59 target/hla_target: try to re-examine under reset in hl_assert_reset()

[gerrit]

This is an automated email from Gerrit.

"Tomas Vanek <van...@fbl.cz>" just uploaded a new patch set to Gerrit, which 
you can find at https://review.openocd.org/c/openocd/+/7229

-- gerrit

commit 64037ecb59200cdc186b88a8992314c1963d6cf3
Author: Tomas Vanek <van...@fbl.cz>
Date:   Wed Sep 28 23:32:00 2022 +0200

    target/hla_target: try to re-examine under reset in hl_assert_reset()
    
    An application often idling in real sleep mode may make a Cortex-M target
    hard to access as CPU clock are gated and debug requests are responded
    by WAIT ack.
    
    Try to examine the target under reset as the last resort.
    
    Change-Id: I7c3de39fb1e6c23b76e2a0a85ab75f23aac94c4d
    Signed-off-by: Tomas Vanek <van...@fbl.cz>

diff --git a/src/target/hla_target.c b/src/target/hla_target.c
index 33126d65a8..2dd8cabf0c 100644
--- a/src/target/hla_target.c
+++ b/src/target/hla_target.c
@@ -347,6 +347,12 @@ static int hl_assert_reset(struct target *target)
 
        adapter->layout->api->write_debug_reg(adapter->handle, DCB_DHCSR, 
DBGKEY|C_DEBUGEN);
 
+       if (!target_was_examined(target) && srst_asserted && res == ERROR_OK) {
+               /* If the target is not examined, now under reset it is good 
time to retry examination */
+               LOG_TARGET_DEBUG(target, "Trying to re-examine under reset");
+               target_examine_one(target);
+       }
+
        /* only set vector catch if halt is requested */
        if (target->reset_halt)
                adapter->layout->api->write_debug_reg(adapter->handle, 
DCB_DEMCR, TRCENA|VC_CORERESET);

--