[PATCH]: 81981c014a target/mips32: fix cppdbg(vscode) signal 0 exception

[gerrit]

This is an automated email from Gerrit.

"Walter J. <walter...@oss.cipunited.com>" just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/7913

-- gerrit

commit 81981c014a2caf68fe0d918f8a6405ec6f50e483
Author: Walter Ji <walter...@oss.cipunited.com>
Date:   Tue Sep 26 17:40:36 2023 +0800

    target/mips32: fix cppdbg(vscode) signal 0 exception
    
    Add default debug reason for halting under mips.
    
    Change-Id: I3b100af11e1e5f9fa1e1729b13a5ee3d25b865d8
    Signed-off-by: Walter Ji <walter...@oss.cipunited.com>

diff --git a/src/target/mips_common.c b/src/target/mips_common.c
index a4053fe02a..2f7464b76f 100644
--- a/src/target/mips_common.c
+++ b/src/target/mips_common.c
@@ -13,7 +13,10 @@
  *                                                                             
                                                                   *
  *      Copyright (C) 2014 by Kent Brinkley                                    
                           *
  *      jkbrinkley_img...@gmail.com                                            
                                   *
- *                                                                         *
+ *                                                                             
                                                                   *
+ *   Copyright (C) 2022 by zhxiao                                              
                                   *
+ *   zhihao.x...@ingenic.com                                                   
                                   *
+ *                                                                             
                                                                   *
  *   Copyright (C) 2023 by Mike Yang                                       *
  *   re...@oss.cipunited.com                                               *
  ***************************************************************************/
@@ -119,6 +122,7 @@ int mips_common_examine_debug_reason(struct target *target)
 {
        struct mips32_common *mips32 = target_to_mips32(target);
        struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
+       struct breakpoint *breakpoints = target->breakpoints;
        uint32_t break_status, dr_status;
        int retval;
 
@@ -138,14 +142,6 @@ int mips_common_examine_debug_reason(struct target *target)
                                        return retval;
                                target->debug_reason = DBG_REASON_BREAKPOINT;
                        }
-               } else {
-                       retval = mips32_cp0_read(ejtag_info, &dr_status, 23, 0);
-                       if (retval != ERROR_OK)
-                               return retval;
-                       if (dr_status & EJTAG_DEBUG_DBP) {
-                               /* we have halted on a sw breakpoint */
-                               target->debug_reason = DBG_REASON_BREAKPOINT;
-                       }
                }
 
                if (ejtag_info->debug_caps & EJTAG_DCR_DB) {
@@ -164,6 +160,16 @@ int mips_common_examine_debug_reason(struct target *target)
                                mips32->dbs_value = break_status;
                        }
                }
+
+               if (breakpoints && target->debug_reason == 
DBG_REASON_NOTHALTED) {
+                       retval = mips32_cp0_read(ejtag_info, &dr_status, 23, 0);
+                       if (retval != ERROR_OK)
+                               return retval;
+                       if (dr_status & EJTAG_DEBUG_DBP) {
+                               /* we have halted on a sw breakpoint */
+                               target->debug_reason = DBG_REASON_BREAKPOINT;
+                       }
+               }
        }
 
        return ERROR_OK;

--