This is an automated email from Gerrit. "Bernhard Rosenkränzer <b...@baylibre.com>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8296
-- gerrit commit d28e368f1eca0d25a87ed6e699d1f5a09dcadf16 Author: Parshintsev Anatoly <anatoly.parshint...@syntacore.com> Date: Thu Jun 22 19:28:52 2023 +0300 target/riscv: support for smp group manipulation this functionality allows to query if a target belongs to some smp group and to dynamically turn on/off smp-specific behavior Change-Id: I67bafb1817c621a38ae4a2f55e12e4143e992c4e Signed-off-by: Parshintsev Anatoly <anatoly.parshint...@syntacore.com> Signed-off-by: Bernhard Rosenkränzer <b...@baylibre.com> diff --git a/doc/openocd.texi b/doc/openocd.texi index 55e6e76808..676392f50f 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -11279,6 +11279,18 @@ When utilizing version 0.11 of the RISC-V Debug Specification, and DBUS registers, respectively. @end deffn +@deffn {Command} {riscv smp} [on|off] +Display, enable or disable SMP handling mode. This command is needed only if +user wants to temporary @b{disable} SMP handling for an existing SMP group +(see @code{aarch64 smp} for additional information). To define an SMP +group the command @code{target smp} should be used. +@end deffn + +@deffn {Command} {riscv smp_gdb} [core_id] +Display/set the current core displayed in GDB. This is needed only if +@code{riscv smp} was used. +@end deffn + @deffn {Command} {riscv use_bscan_tunnel} value Enable or disable use of a BSCAN tunnel to reach DM. Supply the width of the DM transport TAP's instruction register to enable. Supply a value of 0 to disable. diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 9cd4922d20..511a3c6c32 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -3049,6 +3049,9 @@ static const struct command_registration riscv_command_handlers[] = { .usage = "", .chain = semihosting_common_handlers }, + { + .chain = smp_command_handlers + }, COMMAND_REGISTRATION_DONE }; --