[PATCH]: 043386daa0 target/riscv-013: clear progbuf_cache on deassert_reset

[gerrit]

This is an automated email from Gerrit.

"Marek Kraus <gamelas...@outlook.com>" just uploaded a new patch set to Gerrit, 
which you can find at https://review.openocd.org/c/openocd/+/8528

-- gerrit

commit 043386daa020e55c278ef10f457169f70d30ed59
Author: Marek Kraus <gamelas...@outlook.com>
Date:   Tue Oct 22 19:12:02 2024 +0200

    target/riscv-013: clear progbuf_cache on deassert_reset
    
    In case of gd32vf103 and bl702, which have broken ndmreset
    mechanism, chips are needed to be reset by software.
    There are multiple ways of which and how to trigger this reset.
    
    In case of gd32vf103, reset is performed in reset-assert event,
    which overrides the default assert_reset C function, so TCL needs to
    handle haltreq and other tasks, which are normally handled by this
    C function, leading into duplicate and incomplete implementation.
    (for example, rtos awareness is missing here).
    
    To avoid this, in bl702, the reset can be done in reset-assert-post.
    The TCL script writes instructions to SRAM/TCM, which are toggling
    reset registers. At the end, TCL sets PC to that instructions,
    and resumes core to perform full software reset.
    This although still uses progbuf, even if abstract memory access
    is set. Since the progbuf_cache is cleared only in
    assert_reset C function (what at this stage already happened),
    progbuf_cache contains data which are not present, leading into
    troubles when using progbuf again after restart.
    
    I noticed that riscv openocd fork have this mechanism reworked,
    but until it will get upstreamed, it would be good to have this fix,
    to avoid having hacks and redundant code in TCL.
    
    Change-Id: Id661c4005c4467f22e664035245116defda47009
    Signed-off-by: Marek Kraus <gamelas...@outlook.com>

diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index 6c9ed317b0..8c1ed7620a 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -2392,6 +2392,14 @@ static int deassert_reset(struct target *target)
        RISCV013_INFO(info);
        select_dmi(target);
 
+       dm013_info_t *dm = get_dm(target);
+       if (!dm)
+               return ERROR_FAIL;
+
+       /* We clear progbuf_cache again, if it was used by TCL
+        * between assert_reset and deassert_reset */
+       memset(dm->progbuf_cache, 0, sizeof(dm->progbuf_cache));
+
        /* Clear the reset, but make sure haltreq is still set */
        uint32_t control = 0, control_haltreq;
        control = set_field(control, DM_DMCONTROL_DMACTIVE, 1);

--