Hello,

I'm working on an industrial production test device that needs to be able to 
interact with parts under test via JTAG/SWD to:

  *   Write to RAM
  *   Write to the flash
  *   Start execution at specific addresses
  *   Provide single step environment for the device under test (during 
development mode)
  *   Support arm (cortex and later) and riscv targets

We're developing this testing platform with a Zynq Ultrascale as the CPU 
running a scripting language and I hope/plan on using OpenOCD as my tool to 
interact with the parts during testing.

To reduce test time, we plan on putting a JTAG/SWD hardware block into the 
programmable logic that will reliably and quickly clock bits in and out.   It's 
unclear to me what the peripheral interface to userland needs to be and I was 
trying to find the layer in OpenOCD that best fits what I'm trying to do.

I assume it's something like:

  *   Write bitstream
  *   Read bitstream
  *   Write bits, then read bits (or the opposite, or both)
  *   Force interface bits (TMS, TDO, TCLK, etc.) in a particular direction for 
a set time (or number of clocks)
  *   Set clock speed

But I can't quite find that interface.   Looking through the jtag/drivers 
directory, I've found...

The bitbang/gpiod stuff seems way too low level(though as a starting point I 
may start with this to get functionality going while I work on the accelerated 
interface.)

A bunch of the others seem to be too high of level, or not the interface I'm 
interested in (ftdi, usb, etc.).

Close is the xlnx-pcie-xvc one, but the interface to the JTAG hardware isn't 
PCIE(its memory mapped registers over AXI.)

I'm not sure the nomenclature of what I'm trying to make here:

  *   Interface?
  *   Adapter?
  *   Driver?
  *   Transport? (I don't think so)

Also, I see in many of the 'drivers' source code is code that navigates the 
JTAG state machine, which I don't think is something I care about (or, more to 
the point, something I would prefer to leverage from existing code).

Apologies if I have missed finding the architectural documentation that would 
be helpful to me, but what's at the doxygen scrape doesn't seem to really show 
high level flow or how the blocks interact.

Anyways, any guidance would be greatly appreciated,
Russ Schultz
Silicon Labs



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