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"Ashi Gupta <quic_as...@quicinc.com>" just uploaded a new patch set to Gerrit, 
which you can find at https://review.openocd.org/c/openocd/+/8615

-- gerrit

commit 6c90e3a35573983689ef70c877d8d0ba9f62db0c
Author: Ashi Gupta <quic_as...@quicinc.com>
Date:   Fri Jan 10 15:35:14 2025 +0530

    tcl/target: Added target configuration for Qualcomm QCS6490 IOT
    Processors.
    
    QCS6490 and QCM6490 are 6nm processors designed for enterprise and IOT
    applications featuring global 5G and Wi-Fi 6E support with similar
    architecture.
    
    This configuration file will allow debugging applications on these
    processors.
    
    Verified with Olimex(ARM-USB-OCD-H):
    openocd -f tcl/interface/ftdi/olimex-arm-usb-ocd-h.cfg -f
    <path_to_qcs6490_cfg>
    and Jlink:
    openocd -f tcl/interface/jlink.cfg -f <path_to_qcs6490_cfg>
    
    Change-Id: I05e923293134eaa9b70d3cf0d18efac9a024b6c7
    Signed-off-by: Ashi Gupta <quic_as...@quicinc.com>

diff --git a/tcl/target/qualcomm/qcs6490.cfg b/tcl/target/qualcomm/qcs6490.cfg
index 73025f257a..2ca26632c2 100644
--- a/tcl/target/qualcomm/qcs6490.cfg
+++ b/tcl/target/qualcomm/qcs6490.cfg
@@ -1,61 +1,62 @@
-# SPDX-License-Identifier: GPL-2.0-or-later
-#
-# The QCS6490/QCM6490 is a 6nm processor designed for enterprise and Internet 
of Things (IOT) applications,
-# featuring global 5G and Wi-Fi 6E support
-#
-# Product Page:
-# 
https://www.qualcomm.com/products/internet-of-things/industrial/building-enterprise/qcs6490
 
-# 
https://www.qualcomm.com/products/internet-of-things/industrial/building-enterprise/qcm6490
-#
-# Notes:
-# QCS6490/QCM6490 devices support both JTAG and SWD protocols. 
-# Debug has been tested with the following debug adapters/dongles 
-#    1. Olimex FTDI ARM-USB-OCD-H (supports only JTAG)
-#    2. Segger J-Link Plus (supports both JTAG and SWD)
-#
-# example command lines
-#    1. Olimex(ARM-USB-OCD-H)
-#       openocd.exe -f tcl/interface/ftdi/olimex-arm-usb-ocd-h.cfg -f 
tcl/target/qualcomm/qcs6490.cfg
-#
-#    2. Segger J-Link Plus 
-#       openocd.exe -f tcl/interface/jlink.cfg -f 
tcl/target/qualcomm/qcs6490.cfg
-
-if { [info exists CHIPNAME] } {
-   set _CHIPNAME $CHIPNAME
-} else {
-   set _CHIPNAME QCS6490
-}
-
-if { [info exists ENDIAN] } {
-   set _ENDIAN $ENDIAN
-} else {
-   set _ENDIAN little
-}
-
-# For Olimex ARM-USB-OCD-H dongle set _PROTOCOL to jtag
-# For Segger -JLink Plus, _PROTOCOL can be set to either jtag or swd
-set _PROTOCOL jtag
-
-transport select $_PROTOCOL
-adapter speed 500
-reset_config trst_and_srst
-
-# Create DAP/TAP based on Protocol selection
-if {$_PROTOCOL == "swd"} {
-   swd newdap $_CHIPNAME cpu -irlen 15 -expected-id 0x5ba02477
-} elseif {$_PROTOCOL == "jtag"} {
-   jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -expected-id 0x5ba00477
-}
-
-dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu -ignore-syspwrupack
-
-cti create CTI_APSS -dap $_CHIPNAME.dap -baseaddr 0x87020000 -ap-num 1
-
-target create $_CHIPNAME.cpu0 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap 
-coreid 0 -dbgbase 0x87010000 -cti CTI_APSS -event reset-assert-post { dap init 
}
-
-$_CHIPNAME.cpu0 configure -event examine-end { 
-       eval $_CHIPNAME.cpu0 arp_halt  
-}
-
-# Default breakpoints to hardware breakpoints
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# The QCS6490/QCM6490 is a 6nm processor designed for enterprise and Internet 
of Things (IOT) applications,
+# featuring global 5G and Wi-Fi 6E support
+#
+# Product Page:
+# 
https://www.qualcomm.com/products/internet-of-things/industrial/building-enterprise/qcs6490
+# 
https://www.qualcomm.com/products/internet-of-things/industrial/building-enterprise/qcm6490
+#
+# Notes:
+# QCS6490/QCM6490 devices support both JTAG and SWD protocols.
+# Debug has been tested with the following debug adapters/dongles
+#    1. Olimex FTDI ARM-USB-OCD-H (supports only JTAG)
+#    2. Segger J-Link Plus (supports both JTAG and SWD)
+#
+# example command lines
+#    1. Olimex(ARM-USB-OCD-H)
+#       openocd -f tcl/interface/ftdi/olimex-arm-usb-ocd-h.cfg -f 
<path_to_qcs6490_cfg>
+#
+#    2. Segger J-Link Plus
+#       openocd -f tcl/interface/jlink.cfg -f <path_to_qcs6490_cfg>
+
+if { [info exists CHIPNAME] } {
+   set _CHIPNAME $CHIPNAME
+} else {
+   set _CHIPNAME QCS6490
+}
+
+if { [info exists ENDIAN] } {
+   set _ENDIAN $ENDIAN
+} else {
+   set _ENDIAN little
+}
+
+# For Olimex ARM-USB-OCD-H dongle set _PROTOCOL to jtag
+# For Segger -JLink Plus, _PROTOCOL can be set to either jtag or swd
+set _PROTOCOL jtag
+
+transport select $_PROTOCOL
+adapter speed 500
+reset_config trst_and_srst
+
+# Create DAP/TAP based on Protocol selection
+if {$_PROTOCOL == "swd"} {
+   swd newdap $_CHIPNAME cpu -irlen 15 -expected-id 0x5ba02477
+} elseif {$_PROTOCOL == "jtag"} {
+   jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -expected-id 0x5ba00477
+}
+
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu -ignore-syspwrupack
+
+cti create CTI_APSS -dap $_CHIPNAME.dap -baseaddr 0x87020000 -ap-num 1
+
+target create $_CHIPNAME.cpu0 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap 
-coreid 0 \
+   -dbgbase 0x87010000 -cti CTI_APSS -event reset-assert-post { dap init }
+
+$_CHIPNAME.cpu0 configure -event examine-end {
+   eval $_CHIPNAME.cpu0 arp_halt
+}
+
+# Default breakpoints to hardware breakpoints
 gdb breakpoint_override hard
\ No newline at end of file

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