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"Ashi Gupta <quic_as...@quicinc.com>" just uploaded a new patch set to Gerrit, 
which you can find at https://review.openocd.org/c/openocd/+/8614

-- gerrit

commit 72025854766738db3826daf8d8893341205408c4
Author: Ashi Gupta <quic_as...@quicnic.com>
Date:   Thu Jan 9 09:59:16 2025 +0530

    tcl/target : Added target configuration for Qualcomm QCS6490 IOT Processors
    
    QCS6490 and QCM6490 are 6nm processors designed for enterprise and IOT 
applications featuring global 5G and Wi-Fi 6E support with similar 
architecture. This configuration file will allow debugging applications on 
these processors
    
    Have verified with Olimex:
    openocd -f tcl/interface/ftdi/olimex-arm-usb-ocd-h.cfg -f 
tcl/target/qualcomm/qcs6490.cfg
    
    and Jlink:
    openocd -f tcl/interface/jlink.cfg -f tcl/target/qualcomm/qcs6490.cfg
    
    Change-Id: I3af218477ebb4e07acc4fd5ab02871d20da36e42
    Signed-off-by: Ashi Gupta <quic_as...@quicinc.com> Agnelo Dcosta
    <quic_agne...@quicinc.com>

diff --git a/tcl/target/qualcomm/qcs6490.cfg b/tcl/target/qualcomm/qcs6490.cfg
new file mode 100644
index 0000000000..73025f257a
--- /dev/null
+++ b/tcl/target/qualcomm/qcs6490.cfg
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# The QCS6490/QCM6490 is a 6nm processor designed for enterprise and Internet 
of Things (IOT) applications,
+# featuring global 5G and Wi-Fi 6E support
+#
+# Product Page:
+# 
https://www.qualcomm.com/products/internet-of-things/industrial/building-enterprise/qcs6490
 
+# 
https://www.qualcomm.com/products/internet-of-things/industrial/building-enterprise/qcm6490
+#
+# Notes:
+# QCS6490/QCM6490 devices support both JTAG and SWD protocols. 
+# Debug has been tested with the following debug adapters/dongles 
+#    1. Olimex FTDI ARM-USB-OCD-H (supports only JTAG)
+#    2. Segger J-Link Plus (supports both JTAG and SWD)
+#
+# example command lines
+#    1. Olimex(ARM-USB-OCD-H)
+#       openocd.exe -f tcl/interface/ftdi/olimex-arm-usb-ocd-h.cfg -f 
tcl/target/qualcomm/qcs6490.cfg
+#
+#    2. Segger J-Link Plus 
+#       openocd.exe -f tcl/interface/jlink.cfg -f 
tcl/target/qualcomm/qcs6490.cfg
+
+if { [info exists CHIPNAME] } {
+   set _CHIPNAME $CHIPNAME
+} else {
+   set _CHIPNAME QCS6490
+}
+
+if { [info exists ENDIAN] } {
+   set _ENDIAN $ENDIAN
+} else {
+   set _ENDIAN little
+}
+
+# For Olimex ARM-USB-OCD-H dongle set _PROTOCOL to jtag
+# For Segger -JLink Plus, _PROTOCOL can be set to either jtag or swd
+set _PROTOCOL jtag
+
+transport select $_PROTOCOL
+adapter speed 500
+reset_config trst_and_srst
+
+# Create DAP/TAP based on Protocol selection
+if {$_PROTOCOL == "swd"} {
+   swd newdap $_CHIPNAME cpu -irlen 15 -expected-id 0x5ba02477
+} elseif {$_PROTOCOL == "jtag"} {
+   jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -expected-id 0x5ba00477
+}
+
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu -ignore-syspwrupack
+
+cti create CTI_APSS -dap $_CHIPNAME.dap -baseaddr 0x87020000 -ap-num 1
+
+target create $_CHIPNAME.cpu0 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap 
-coreid 0 -dbgbase 0x87010000 -cti CTI_APSS -event reset-assert-post { dap init 
}
+
+$_CHIPNAME.cpu0 configure -event examine-end { 
+       eval $_CHIPNAME.cpu0 arp_halt  
+}
+
+# Default breakpoints to hardware breakpoints
+gdb breakpoint_override hard
\ No newline at end of file

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