This is an automated email from Gerrit. "Peter pan <[email protected]>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/9016
-- gerrit commit baa6a3a1bd40de752c49f37de3e0b1e18a69342c Author: Jason Liu <[email protected]> Date: Wed Apr 14 16:39:36 2021 +0800 add i.mx8ulp target and evk board support Use the following command to enable the FTDI JTAG support: sudo ./bcu set_gpio remote_en 1 -board=imx8ulpevk support Cortex-a35 and Cortex-m33 NXP bcu tool (see https://github.com/NXPmicro/bcu) Change-Id: I4167bb16ea329ff0a2f59bbc46e6c9ece605ab80 Signed-off-by: Jason Liu <[email protected]> Signed-off-by: Jiafei Pan <[email protected]> diff --git a/tcl/board/imx8ulp-evk.cfg b/tcl/board/imx8ulp-evk.cfg new file mode 100644 index 0000000000..9bc6e350d0 --- /dev/null +++ b/tcl/board/imx8ulp-evk.cfg @@ -0,0 +1,15 @@ +# +# configuration file for NXP MC-IMX8ULP-EVK +# +# Board includes FTDI-based JTAG adapter: interface/ftdi/imx8ulp-evk.cfg +# + +transport select jtag +adapter speed 1000 +reset_config srst_only +adapter srst delay 100 + +set CHIPNAME imx8ulp +set CHIPCORES 2 + +source [find target/imx8ulp.cfg] diff --git a/tcl/interface/ftdi/imx8ulp-evk.cfg b/tcl/interface/ftdi/imx8ulp-evk.cfg new file mode 100644 index 0000000000..f9b315d48a --- /dev/null +++ b/tcl/interface/ftdi/imx8ulp-evk.cfg @@ -0,0 +1,28 @@ +# +# Configuration file for NXP MC-IMX8ULP-EVK on-board internal JTAG +# +# Using this interface requires enabling "remote mode" for the board using the +# NXP bcu tool (see https://github.com/NXPmicro/bcu) +# +# bcu set_gpio remote_en 1 -board=imx8ulpevk +# +# The REMOTE_EN gpio is accessible through the same FTDI adapter but it's +# behind an I2C GPIO expander. +# + +adapter driver ftdi +ftdi_vid_pid 0x0403 0x6011 +ftdi_channel 0 + +ftdi_layout_init 0x00f8 0x000b + +ftdi_layout_signal RESET_B -data 0x0010 -oe 0x0010 +# Called SYS_nRST in schematics +ftdi_layout_signal nSRST -data 0x0020 -oe 0x0020 +ftdi_layout_signal IO_nRST -data 0x0040 -oe 0x0040 +ftdi_layout_signal ONOFF_B -data 0x0080 -oe 0x0080 + +ftdi_layout_signal GPIO1 -data 0x0100 -oe 0x0100 +ftdi_layout_signal GPIO2 -data 0x0200 -oe 0x0200 +ftdi_layout_signal GPIO3 -data 0x0400 -oe 0x0400 +ftdi_layout_signal GPIO4 -data 0x0800 -oe 0x0800 diff --git a/tcl/target/imx8ulp.cfg b/tcl/target/imx8ulp.cfg new file mode 100644 index 0000000000..9e76878bec --- /dev/null +++ b/tcl/target/imx8ulp.cfg @@ -0,0 +1,63 @@ +# +# configuration file for NXP i.MX8ULP family of SoCs +# +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME imx8ulp +} + +if { [info exists CHIPCORES] } { + set _cores $CHIPCORES +} else { + set _cores 1 +} + +# CoreSight Debug Access Port +if { [info exists DAP_TAPID] } { + set _DAP_TAPID $DAP_TAPID +} else { + set _DAP_TAPID 0x088e801d +} + +# the DAP tap +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \ + -expected-id $_DAP_TAPID + +dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu + +set _TARGETNAME $_CHIPNAME.a35 +set _CTINAME $_CHIPNAME.cti + +set DBGBASE {0x80410000 0x80510000} +set CTIBASE {0x80420000 0x80520000} + +for { set _core 0 } { $_core < $_cores } { incr _core } { + + cti create $_CTINAME.$_core -dap $_CHIPNAME.dap -ap-num 1 \ + -ctibase [lindex $CTIBASE $_core] + + set _command "target create $_TARGETNAME.$_core aarch64 -dap $_CHIPNAME.dap \ + -dbgbase [lindex $DBGBASE $_core] -cti $_CTINAME.$_core" + + if { $_core != 0 } { + # non-boot core examination may fail + set _command "$_command -defer-examine" + set _smp_command "$_smp_command $_TARGETNAME.$_core" + } else { + set _smp_command "target smp $_TARGETNAME.$_core" + } + + eval $_command +} + +eval $_smp_command + +# declare the auxiliary Cortex-M33 core on AP #0 +target create ${_CHIPNAME}.m4 cortex_m -dap ${_CHIPNAME}.dap -ap-num 0 + +# AHB-AP for direct access to soc bus +target create ${_CHIPNAME}.ahb mem_ap -dap ${_CHIPNAME}.dap -ap-num 0 + +# default target is A35 core 0 +targets $_TARGETNAME.0 --
