This is an automated email from Gerrit.
"Peter pan <peter.pa...@gmail.com>" just uploaded a new patch set to Gerrit,
which you can find at https://review.openocd.org/c/openocd/+/9018
-- gerrit
commit 9c5eeb8aa5a30b8624bb3d80ca9d412cedbfb7af
Author: Jiafei Pan <jiafei....@nxp.com>
Date: Mon Sep 8 16:41:35 2025 +0800
target: add NXP EVK board with reset
nxp_imx8mp-evk-reset.cfg will reset the board for each openocd
connection.
Have verified with JLink:
openocd -f interface/jlink.cfg -f board/nxp_imx8mp-evk-reset.cfg
Change-Id: I171026257be6cb73182da43200fd7ad625684258
Signed-off-by: Jiafei Pan <jiafei....@nxp.com>
diff --git a/tcl/board/nxp_imx8mp-evk-reset.cfg
b/tcl/board/nxp_imx8mp-evk-reset.cfg
new file mode 100644
index 0000000000..607b9cfb1b
--- /dev/null
+++ b/tcl/board/nxp_imx8mp-evk-reset.cfg
@@ -0,0 +1,39 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# configuration file for NXP IMX8M Plus EVK
+#
+
+# only JTAG supported
+transport select jtag
+
+# set a safe JTAG clock speed, can be overridden
+adapter speed 1000
+
+# default JTAG configuration has only SRST and no TRST
+reset_config srst_only srst_push_pull
+
+# delay after SRST goes inactive
+adapter srst delay 70
+
+
+# board has an i.MX8MP with 4 Cortex-A55 cores
+set CHIPNAME imx8mp
+set CHIPCORES 4
+
+# reset the board
+proc init_reset {mode} {
+ # assert board reset
+ adapter assert srst
+
+ sleep 1
+ # deassert board reset
+ adapter deassert srst
+ sleep 3
+}
+
+proc jtag_init {} {
+ init_reset startup
+}
+
+# source SoC configuration
+source [find target/imx8mp.cfg]
--
