[PATCH]: fe3f8f3d76 STM32L: Automatically execute an OBL reset after locking or unlocking stm32lx devices

[gerrit]

This is an automated email from Gerrit.

"P. Frost <m...@pfrost.me>" just uploaded a new patch set to Gerrit, which you 
can find at https://review.openocd.org/c/openocd/+/9026

-- gerrit

commit fe3f8f3d7690366532214802e73ef52dc32c6d81
Author: Peter Frost <m...@pfrost.me>
Date:   Wed Oct 15 11:43:11 2025 +0100

    STM32L: Automatically execute an OBL reset after locking or unlocking
    stm32lx devices
    
    This aligns it with the behaviour of the stm32l4x driver, which is
    more user-friendly as the device does not need to be manually
    power-cycled to apply the protection
    
    Change-Id: I3382bb245f03463fac7cbad45572eaa038c3e953
    Signed-off-by: Peter Frost <m...@pfrost.me>

diff --git a/src/flash/nor/stm32lx.c b/src/flash/nor/stm32lx.c
index 2c7563e95a..bc8561b584 100644
--- a/src/flash/nor/stm32lx.c
+++ b/src/flash/nor/stm32lx.c
@@ -267,6 +267,26 @@ static const struct stm32lx_part_info stm32lx_parts[] = {
        },
 };
 
+static int stm32lx_obl_launch(struct flash_bank *bank)
+{
+       struct target *target = bank->target;
+       struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
+       int retval;
+
+       /* This will fail as the target gets immediately rebooted */
+       target_write_u32(target, stm32lx_info->flash_base + FLASH_PECR,
+                        FLASH_PECR__OBL_LAUNCH);
+
+       size_t tries = 10;
+       do {
+               target_halt(target);
+               retval = target_poll(target);
+       } while (--tries > 0 &&
+                (retval != ERROR_OK || target->state != TARGET_HALTED));
+
+       return tries ? ERROR_OK : ERROR_FAIL;
+}
+
 /* flash bank stm32lx <base> <size> 0 0 <target#>
  */
 FLASH_BANK_COMMAND_HANDLER(stm32lx_flash_bank_command)
@@ -327,10 +347,14 @@ COMMAND_HANDLER(stm32lx_handle_lock_command)
        retval = stm32lx_lock(bank);
 
        if (retval == ERROR_OK)
-               command_print(CMD, "STM32Lx locked, takes effect after power 
cycle.");
+               command_print(CMD, "STM32Lx locked");
        else
                command_print(CMD, "STM32Lx lock failed");
 
+       retval = stm32lx_obl_launch(bank);
+       if (retval != ERROR_OK)
+               return retval;
+
        return retval;
 }
 
@@ -347,10 +371,14 @@ COMMAND_HANDLER(stm32lx_handle_unlock_command)
        retval = stm32lx_unlock(bank);
 
        if (retval == ERROR_OK)
-               command_print(CMD, "STM32Lx unlocked, takes effect after power 
cycle.");
+               command_print(CMD, "STM32Lx unlocked");
        else
                command_print(CMD, "STM32Lx unlock failed");
 
+       retval = stm32lx_obl_launch(bank);
+       if (retval != ERROR_OK)
+               return retval;
+
        return retval;
 }
 
@@ -1234,26 +1262,6 @@ static int stm32lx_wait_until_bsy_clear_timeout(struct 
flash_bank *bank, int tim
        return retval;
 }
 
-static int stm32lx_obl_launch(struct flash_bank *bank)
-{
-       struct target *target = bank->target;
-       struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
-       int retval;
-
-       /* This will fail as the target gets immediately rebooted */
-       target_write_u32(target, stm32lx_info->flash_base + FLASH_PECR,
-                        FLASH_PECR__OBL_LAUNCH);
-
-       size_t tries = 10;
-       do {
-               target_halt(target);
-               retval = target_poll(target);
-       } while (--tries > 0 &&
-                (retval != ERROR_OK || target->state != TARGET_HALTED));
-
-       return tries ? ERROR_OK : ERROR_FAIL;
-}
-
 static int stm32lx_lock(struct flash_bank *bank)
 {
        int retval;

--