This is an automated email from Gerrit. "Antonio Borneo <[email protected]>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/9764
-- gerrit commit a3de23243d27b5051d883dfdaec7d04d5b81a4e8 Author: Zane Leung <[email protected]> Date: Mon Jun 29 16:19:21 2026 +0200 riscv: move interrupt_high_delay to struct riscv_dtm Move the field riscv011_info_t::interrupt_high_delay as struct riscv_dtm::interrupt_high_delay Change-Id: I9c285b5765a4e495ab74549b4520aca2614104d4 Signed-off-by: Zane Leung <[email protected]> Signed-off-by: Antonio Borneo <[email protected]> diff --git a/src/target/riscv/riscv-011.c b/src/target/riscv/riscv-011.c index 8c51aae07b..5f6f52bcb5 100644 --- a/src/target/riscv/riscv-011.c +++ b/src/target/riscv/riscv-011.c @@ -184,12 +184,6 @@ typedef struct { struct memory_cache_line dram_cache[DRAM_CACHE_SIZE]; - /* This value is incremented every time we read the debug interrupt as - * high. It's used to add extra run-test/idle cycles after setting debug - * interrupt high, so ideally we never have to perform a whole extra scan - * before the interrupt is cleared. */ - unsigned int interrupt_high_delay; - bool never_halted; } riscv011_info_t; @@ -324,33 +318,30 @@ static uint32_t idcode_scan(struct target *target) static void increase_dbus_busy_delay(struct target *target) { - riscv011_info_t *info = get_info(target); struct riscv_dtm *dtm = target_to_dtm(target); dtm->dbus_busy_delay += dtm->dbus_busy_delay / 10 + 1; LOG_DEBUG("dtmcontrol_idle=%d, dbus_busy_delay=%d, interrupt_high_delay=%d", dtm->idle, dtm->dbus_busy_delay, - info->interrupt_high_delay); + dtm->interrupt_high_delay); dtmcs_scan(target->tap, DTMCONTROL_DBUS_RESET, NULL /* discard value */); } static void increase_interrupt_high_delay(struct target *target) { - riscv011_info_t *info = get_info(target); struct riscv_dtm *dtm = target_to_dtm(target); - info->interrupt_high_delay += info->interrupt_high_delay / 10 + 1; + dtm->interrupt_high_delay += dtm->interrupt_high_delay / 10 + 1; LOG_DEBUG("dtmcontrol_idle=%d, dbus_busy_delay=%d, interrupt_high_delay=%d", dtm->idle, dtm->dbus_busy_delay, - info->interrupt_high_delay); + dtm->interrupt_high_delay); } static void add_dbus_scan(const struct target *target, struct scan_field *field, uint8_t *out_value, uint8_t *in_value, dbus_op_t op, uint16_t address, uint64_t data) { - riscv011_info_t *info = get_info(target); RISCV_INFO(r); struct riscv_dtm *dtm = target_to_dtm(target); @@ -358,7 +349,7 @@ static void add_dbus_scan(const struct target *target, struct scan_field *field, r->reset_delays_wait--; if (r->reset_delays_wait < 0) { dtm->dbus_busy_delay = 0; - info->interrupt_high_delay = 0; + dtm->interrupt_high_delay = 0; } } @@ -374,7 +365,7 @@ static void add_dbus_scan(const struct target *target, struct scan_field *field, int idle_count = dtm->idle + dtm->dbus_busy_delay; if (data & DMCONTROL_INTERRUPT) - idle_count += info->interrupt_high_delay; + idle_count += dtm->interrupt_high_delay; if (idle_count) jtag_add_runtest(idle_count, TAP_IDLE); diff --git a/src/target/riscv/riscv_dtm.h b/src/target/riscv/riscv_dtm.h index c08d0686f1..e51d5a2d2c 100644 --- a/src/target/riscv/riscv_dtm.h +++ b/src/target/riscv/riscv_dtm.h @@ -18,6 +18,12 @@ struct riscv_dtm { * It's used to determine how many run-test/idle cycles to feed the target * in between accesses. */ unsigned int dbus_busy_delay; + + /* This value is incremented every time we read the debug interrupt as + * high. It's used to add extra run-test/idle cycles after setting debug + * interrupt high, so ideally we never have to perform a whole extra scan + * before the interrupt is cleared. */ + unsigned int interrupt_high_delay; }; struct riscv_dtm *target_to_dtm(const struct target *target); --
