This is an automated email from Gerrit. "Antonio Borneo <[email protected]>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/9761
-- gerrit commit 6b2cae749fba0e5fcc8a4359a1be0e1af8afbd42 Author: Zane Leung <[email protected]> Date: Mon Jun 29 15:47:19 2026 +0200 riscv: move number of address bits to struct riscv_dtm Move the fields - riscv011_info_t::addrbits - riscv013_info_t::abits as struct riscv_dtm::abits Change-Id: I2d386bee58b385b1fd6655a855e1918af3e15cd8 Signed-off-by: Zane Leung <[email protected]> Signed-off-by: Antonio Borneo <[email protected]> diff --git a/src/target/riscv/riscv-011.c b/src/target/riscv/riscv-011.c index 717a9cb577..de33a6a7a6 100644 --- a/src/target/riscv/riscv-011.c +++ b/src/target/riscv/riscv-011.c @@ -23,6 +23,7 @@ #include "target/breakpoints.h" #include "helper/time_support.h" #include "riscv.h" +#include "riscv_dtm.h" #include "riscv_reg.h" #include "riscv-011_reg.h" #include "gdb_regs.h" @@ -170,8 +171,6 @@ struct memory_cache_line { }; typedef struct { - /* Number of address bits in the dbus register. */ - uint8_t addrbits; /* Number of words in Debug RAM. */ unsigned int dramsize; uint64_t dcsr; @@ -358,6 +357,7 @@ static void add_dbus_scan(const struct target *target, struct scan_field *field, { riscv011_info_t *info = get_info(target); RISCV_INFO(r); + struct riscv_dtm *dtm = target_to_dtm(target); if (r->reset_delays_wait >= 0) { r->reset_delays_wait--; @@ -367,13 +367,13 @@ static void add_dbus_scan(const struct target *target, struct scan_field *field, } } - field->num_bits = info->addrbits + DBUS_OP_SIZE + DBUS_DATA_SIZE; + field->num_bits = dtm->abits + DBUS_OP_SIZE + DBUS_DATA_SIZE; field->in_value = in_value; field->out_value = out_value; buf_set_u64(out_value, DBUS_OP_START, DBUS_OP_SIZE, op); buf_set_u64(out_value, DBUS_DATA_START, DBUS_DATA_SIZE, data); - buf_set_u64(out_value, DBUS_ADDRESS_START, info->addrbits, address); + buf_set_u64(out_value, DBUS_ADDRESS_START, dtm->abits, address); jtag_add_dr_scan(target->tap, 1, field, TAP_IDLE); @@ -420,24 +420,25 @@ static dbus_status_t dbus_scan(struct target *target, uint16_t *address_in, uint64_t *data_in, dbus_op_t op, uint16_t address_out, uint64_t data_out) { riscv011_info_t *info = get_info(target); + struct riscv_dtm *dtm = target_to_dtm(target); uint8_t in[8] = {0}; uint8_t out[8] = {0}; struct scan_field field = { - .num_bits = info->addrbits + DBUS_OP_SIZE + DBUS_DATA_SIZE, + .num_bits = dtm->abits + DBUS_OP_SIZE + DBUS_DATA_SIZE, .out_value = out, .in_value = in }; if (address_in) *address_in = 0; - if (info->addrbits == 0) { + if (dtm->abits == 0) { LOG_TARGET_ERROR(target, "Can't access DMI because addrbits=0."); return DBUS_STATUS_FAILED; } buf_set_u64(out, DBUS_OP_START, DBUS_OP_SIZE, op); buf_set_u64(out, DBUS_DATA_START, DBUS_DATA_SIZE, data_out); - buf_set_u64(out, DBUS_ADDRESS_START, info->addrbits, address_out); + buf_set_u64(out, DBUS_ADDRESS_START, dtm->abits, address_out); /* Assume dbus is already selected. */ jtag_add_dr_scan(target->tap, 1, &field, TAP_IDLE); @@ -457,7 +458,7 @@ static dbus_status_t dbus_scan(struct target *target, uint16_t *address_in, *data_in = buf_get_u64(in, DBUS_DATA_START, DBUS_DATA_SIZE); if (address_in) - *address_in = buf_get_u32(in, DBUS_ADDRESS_START, info->addrbits); + *address_in = buf_get_u32(in, DBUS_ADDRESS_START, dtm->abits); dump_field(&field); @@ -692,14 +693,14 @@ static int read_bits(struct target *target, bits_t *result) uint64_t value; dbus_status_t status; uint16_t address_in; - riscv011_info_t *info = get_info(target); + struct riscv_dtm *dtm = target_to_dtm(target); do { unsigned int i = 0; do { status = dbus_scan(target, &address_in, &value, DBUS_OP_READ, 0, 0); if (status == DBUS_STATUS_BUSY) { - if (address_in == (1<<info->addrbits) - 1 && + if (address_in == (1 << dtm->abits) - 1 && value == (1ULL<<DBUS_DATA_SIZE) - 1) { LOG_ERROR("TDO seems to be stuck high."); return ERROR_FAIL; @@ -864,6 +865,7 @@ static int cache_check(struct target *target) static int cache_write(struct target *target, unsigned int address, bool run) { LOG_DEBUG("enter"); + struct riscv_dtm *dtm = target_to_dtm(target); riscv011_info_t *info = get_info(target); scans_t *scans = scans_new(target, info->dramsize + 2); if (!scans) @@ -972,7 +974,7 @@ static int cache_write(struct target *target, unsigned int address, bool run) } else { /* We read a useful value in that last scan. */ unsigned int read_addr = scans_get_u32(scans, scans->next_scan-1, - DBUS_ADDRESS_START, info->addrbits); + DBUS_ADDRESS_START, dtm->abits); if (read_addr != address) { LOG_INFO("Got data from 0x%x but expected it from 0x%x", read_addr, address); @@ -1509,10 +1511,11 @@ static int examine(struct target *target) return ERROR_FAIL; } + struct riscv_dtm *dtm = target_to_dtm(target); RISCV_INFO(r); riscv011_info_t *info = get_info(target); - info->addrbits = get_field(dtmcontrol, DTMCONTROL_ADDRBITS); + dtm->abits = get_field(dtmcontrol, DTMCONTROL_ADDRBITS); info->dtmcontrol_idle = get_field(dtmcontrol, DTMCONTROL_IDLE); if (info->dtmcontrol_idle == 0) { /* Some old SiFive cores don't set idle but need it to be 1. */ @@ -1623,6 +1626,7 @@ static int examine(struct target *target) static riscv_error_t handle_halt_routine(struct target *target) { + struct riscv_dtm *dtm = target_to_dtm(target); riscv011_info_t *info = get_info(target); scans_t *scans = scans_new(target, 256); @@ -1683,7 +1687,7 @@ static riscv_error_t handle_halt_routine(struct target *target) DBUS_OP_SIZE); uint64_t data = scans_get_u64(scans, i, DBUS_DATA_START, DBUS_DATA_SIZE); uint32_t address = scans_get_u32(scans, i, DBUS_ADDRESS_START, - info->addrbits); + dtm->abits); switch (status) { case DBUS_STATUS_SUCCESS: break; diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 0f1a66a737..4959f1145e 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -25,6 +25,7 @@ #include "helper/list.h" #include "riscv.h" #include "riscv-013.h" +#include "riscv_dtm.h" #include "riscv_reg.h" #include "riscv-013_reg.h" #include "debug_defines.h" @@ -207,8 +208,6 @@ static bool ac_cache_contains(const struct ac_cache *cache, uint32_t command) typedef struct { /* The indexed used to address this hart in its DM. */ unsigned int index; - /* Number of address bits in the dbus register. */ - unsigned int abits; /* Number of abstract command data registers. */ unsigned int datacount; /* Number of words in the Program Buffer. */ @@ -355,11 +354,11 @@ static struct riscv_debug_reg_ctx get_riscv_debug_reg_ctx(const struct target *t return default_context; } - RISCV013_INFO(info); + struct riscv_dtm *dtm = target_to_dtm(target); const struct riscv_debug_reg_ctx context = { .XLEN = { .value = riscv_xlen(target), .is_set = true }, .DXLEN = { .value = riscv_xlen(target), .is_set = true }, - .abits = { .value = info->abits, .is_set = true }, + .abits = { .value = dtm->abits, .is_set = true }, }; return context; } @@ -560,7 +559,7 @@ static int check_dbgbase_exists(struct target *target) { uint32_t next_dm = 0; unsigned int count = 1; - riscv013_info_t *info = get_info(target); + struct riscv_dtm *dtm = target_to_dtm(target); LOG_TARGET_DEBUG(target, "Searching for DM with DMI base address (dbgbase) = 0x%x", target->dbgbase); while (1) { @@ -582,10 +581,10 @@ static int check_dbgbase_exists(struct target *target) LOG_TARGET_ERROR(target, "Reached the end of DM chain (detected %u DMs in total).", count); break; } - if (next_dm >> info->abits) { + if (next_dm >> dtm->abits) { LOG_TARGET_ERROR(target, "The address of the next Debug Module does not fit into %u bits, " "which is the width of the DMI bus address. This is a HW bug", - info->abits); + dtm->abits); break; } /* Safety: Avoid looping forever in case of buggy nextdm values in the hardware. */ @@ -2026,6 +2025,8 @@ static int examine_dm(struct target *target) static int examine(struct target *target) { + struct riscv_dtm *dtm = target_to_dtm(target); + /* We reset target state in case if something goes wrong during examine: * DTM/DM scans could fail or hart may fail to halt. */ target->state = TARGET_UNKNOWN; @@ -2052,24 +2053,24 @@ static int examine(struct target *target) riscv013_info_t *info = get_info(target); info->index = target->coreid; - info->abits = get_field(dtmcontrol, DTM_DTMCS_ABITS); + dtm->abits = get_field(dtmcontrol, DTM_DTMCS_ABITS); info->dtmcs_idle = get_field(dtmcontrol, DTM_DTMCS_IDLE); - if (info->abits > RISCV013_DTMCS_ABITS_MAX) { + if (dtm->abits > RISCV013_DTMCS_ABITS_MAX) { /* Max. address width given by the debug specification is exceeded */ LOG_TARGET_ERROR(target, "The target's debug bus (DMI) address width exceeds " "the maximum:"); LOG_TARGET_ERROR(target, " found dtmcs.abits = %d; maximum is abits = %d.", - info->abits, RISCV013_DTMCS_ABITS_MAX); + dtm->abits, RISCV013_DTMCS_ABITS_MAX); return ERROR_FAIL; } - if (info->abits == 0) { + if (dtm->abits == 0) { LOG_TARGET_ERROR(target, "dtmcs.abits is zero. Check JTAG connectivity/board power"); return ERROR_FAIL; } - if (info->abits < RISCV013_DTMCS_ABITS_MIN) { + if (dtm->abits < RISCV013_DTMCS_ABITS_MIN) { /* The requirement for minimum DMI address width of 7 bits is part of * the RISC-V Debug spec since Jan-20-2017 (commit 03df6ee7). However, * implementations exist that implement narrower DMI address. For example @@ -2080,7 +2081,7 @@ static int examine(struct target *target) LOG_TARGET_WARNING(target, "The target's debug bus (DMI) address width is " "lower than the minimum:"); LOG_TARGET_WARNING(target, " found dtmcs.abits = %d; minimum is abits = %d.", - info->abits, RISCV013_DTMCS_ABITS_MIN); + dtm->abits, RISCV013_DTMCS_ABITS_MIN); } if (check_dbgbase_exists(target) != ERROR_OK) { @@ -2303,7 +2304,6 @@ static COMMAND_HELPER(riscv013_print_info, struct target *target) riscv_print_info_line(CMD, "target", "memory.write_while_running128", get_field(info->sbcs, DM_SBCS_SBACCESS128)); /* Lower level description. */ - riscv_print_info_line(CMD, "dm", "abits", info->abits); riscv_print_info_line(CMD, "dm", "progbufsize", info->progbufsize); riscv_print_info_line(CMD, "dm", "sbversion", get_field(info->sbcs, DM_SBCS_SBVERSION)); riscv_print_info_line(CMD, "dm", "sbasize", get_field(info->sbcs, DM_SBCS_SBASIZE)); @@ -5462,32 +5462,36 @@ static int riscv013_execute_progbuf(struct target *target, uint32_t *cmderr) static void riscv013_fill_dmi_write(const struct target *target, uint8_t *buf, uint32_t a, uint32_t d) { - RISCV013_INFO(info); + struct riscv_dtm *dtm = target_to_dtm(target); + buf_set_u32(buf, DTM_DMI_OP_OFFSET, DTM_DMI_OP_LENGTH, DMI_OP_WRITE); buf_set_u32(buf, DTM_DMI_DATA_OFFSET, DTM_DMI_DATA_LENGTH, d); - buf_set_u32(buf, DTM_DMI_ADDRESS_OFFSET, info->abits, a); + buf_set_u32(buf, DTM_DMI_ADDRESS_OFFSET, dtm->abits, a); } static void riscv013_fill_dmi_read(const struct target *target, uint8_t *buf, uint32_t a) { - RISCV013_INFO(info); + struct riscv_dtm *dtm = target_to_dtm(target); + buf_set_u32(buf, DTM_DMI_OP_OFFSET, DTM_DMI_OP_LENGTH, DMI_OP_READ); buf_set_u32(buf, DTM_DMI_DATA_OFFSET, DTM_DMI_DATA_LENGTH, 0); - buf_set_u32(buf, DTM_DMI_ADDRESS_OFFSET, info->abits, a); + buf_set_u32(buf, DTM_DMI_ADDRESS_OFFSET, dtm->abits, a); } static void riscv013_fill_dm_nop(const struct target *target, uint8_t *buf) { - RISCV013_INFO(info); + struct riscv_dtm *dtm = target_to_dtm(target); + buf_set_u32(buf, DTM_DMI_OP_OFFSET, DTM_DMI_OP_LENGTH, DMI_OP_NOP); buf_set_u32(buf, DTM_DMI_DATA_OFFSET, DTM_DMI_DATA_LENGTH, 0); - buf_set_u32(buf, DTM_DMI_ADDRESS_OFFSET, info->abits, 0); + buf_set_u32(buf, DTM_DMI_ADDRESS_OFFSET, dtm->abits, 0); } static unsigned int riscv013_get_dmi_address_bits(const struct target *target) { - RISCV013_INFO(info); - return info->abits; + struct riscv_dtm *dtm = target_to_dtm(target); + + return dtm->abits; } /* Helper Functions. */ diff --git a/src/target/riscv/riscv_dtm.h b/src/target/riscv/riscv_dtm.h index 706a608e01..9bafb15eeb 100644 --- a/src/target/riscv/riscv_dtm.h +++ b/src/target/riscv/riscv_dtm.h @@ -7,6 +7,8 @@ struct target; /* This represents an RISC-V Debug Transport Module (DTM) */ struct riscv_dtm { + /* Number of address bits in the dbus register. */ + unsigned int abits; }; struct riscv_dtm *target_to_dtm(const struct target *target); --
