Committed
STR912 now uses RCLK if available.
Added jtag_rclk that can be used to set rclk w/fallback to a given
frequency.
> help jtag_rclk
jtag_rclk fallback_speed_khz - set JTAG speed to RCLK or use
fallback speed
Index: C:/workspace/openocd/src/helper/startup.tcl
===================================================================
--- C:/workspace/openocd/src/helper/startup.tcl (revision 966)
+++ C:/workspace/openocd/src/helper/startup.tcl (working copy)
@@ -160,4 +160,14 @@
# Fix!!! we're resetting all targets here! Really we should reset only
# one target
reset halt
-}
\ No newline at end of file
+}
+
+
+# If RCLK is not supported, use fallback_speed_khz
+proc jtag_rclk {fallback_speed_khz} {
+ if {[catch {jtag_khz 0}]!=0} {
+ jtag_khz $fallback_speed_khz
+ }
+}
+
+add_help_text jtag_rclk "fallback_speed_khz - set JTAG speed to RCLK
or use fallback speed"
\ No newline at end of file
Index: C:/workspace/openocd/src/target/target/str912.cfg
===================================================================
--- C:/workspace/openocd/src/target/target/str912.cfg (revision 966)
+++ C:/workspace/openocd/src/target/target/str912.cfg (working copy)
@@ -2,9 +2,9 @@
# jtag speed. We need to stick to 16kHz until we've finished reset.
-jtag_khz 16
+jtag_rclk 16
proc target_0_pre_reset {} {
- jtag_khz 16
+ jtag_rclk 16
}
proc target_0_post_reset {} {
@@ -9,7 +9,7 @@
proc target_0_post_reset {} {
# We can increase speed now that we know the target is halted.
- jtag_khz 3000
+ jtag_rclk 3000
# -- Enable 96K RAM
# PFQBC enabled / DTCM & AHB wait-states disabled
--
Øyvind Harboe
http://www.zylin.com/zy1000.html
ARM7 ARM9 XScale Cortex
JTAG debugger and flash programmer
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