Øyvind Harboe wrote: >> - openocd from svn head (pulled some weeks ago) > > Stuff has happened w/reset & halting lately. > > Could you rerun w/openocd trunk?
Sure - now (revision 972) it fails completely. Both "reset halt" and "reset init" behave the save, no matter if I specify the "lm3" variant on the target line or not. The target is reset and runs (and continues to run ...). Attached is a log using target cortex_m3 little 0 lm3s cu Michael
Script started on Wed Aug 27 22:29:51 2008 $ openocd -d3 -f wiggler2.cfg -f rdk-idm.cfg Open On-Chip Debugger 1.0 (2008-08-27-22:25) svn:972M $URL: svn://svn.berlios.de/openocd/trunk/src/openocd.c $ Debug: 4 1 configuration.c:88 find_file(): found /home/rincewind/.openocd/wiggler2.cfg Debug: 6 1 command.c:79 script_command(): script_command - interface Debug: 7 1 command.c:96 script_command(): script_command - interface, argv[0]=ocd_interface Debug: 8 1 command.c:96 script_command(): script_command - interface, argv[1]=parport Debug: 10 1 command.c:79 script_command(): script_command - parport_port Debug: 11 1 command.c:96 script_command(): script_command - parport_port, argv[0]=ocd_parport_port Debug: 12 1 command.c:96 script_command(): script_command - parport_port, argv[1]=0 Debug: 14 1 command.c:79 script_command(): script_command - parport_cable Debug: 15 2 command.c:96 script_command(): script_command - parport_cable, argv[0]=ocd_parport_cable Debug: 16 2 command.c:96 script_command(): script_command - parport_cable, argv[1]=wiggler2 Debug: 18 2 command.c:79 script_command(): script_command - jtag_speed Debug: 19 2 command.c:96 script_command(): script_command - jtag_speed, argv[0]=ocd_jtag_speed Debug: 20 2 command.c:96 script_command(): script_command - jtag_speed, argv[1]=0 Debug: 21 2 jtag.c:1876 handle_jtag_speed_command(): handle jtag speed User: 22 2 command.c:360 command_print(): jtag_speed: 0 Debug: 23 2 configuration.c:88 find_file(): found rdk-idm.cfg Debug: 25 2 command.c:79 script_command(): script_command - jtag_nsrst_delay Debug: 26 2 command.c:96 script_command(): script_command - jtag_nsrst_delay, argv[0]=ocd_jtag_nsrst_delay Debug: 27 2 command.c:96 script_command(): script_command - jtag_nsrst_delay, argv[1]=150 Debug: 29 2 command.c:79 script_command(): script_command - jtag_ntrst_delay Debug: 30 2 command.c:96 script_command(): script_command - jtag_ntrst_delay, argv[0]=ocd_jtag_ntrst_delay Debug: 31 2 command.c:96 script_command(): script_command - jtag_ntrst_delay, argv[1]=150 Debug: 33 3 command.c:79 script_command(): script_command - reset_config Debug: 34 3 command.c:96 script_command(): script_command - reset_config, argv[0]=ocd_reset_config Debug: 35 3 command.c:96 script_command(): script_command - reset_config, argv[1]=trst_and_srst Debug: 37 3 command.c:79 script_command(): script_command - jtag_device Debug: 38 3 command.c:96 script_command(): script_command - jtag_device, argv[0]=ocd_jtag_device Debug: 39 3 command.c:96 script_command(): script_command - jtag_device, argv[1]=4 Debug: 40 3 command.c:96 script_command(): script_command - jtag_device, argv[2]=0x1 Debug: 41 3 command.c:96 script_command(): script_command - jtag_device, argv[3]=0xf Debug: 42 3 command.c:96 script_command(): script_command - jtag_device, argv[4]=0xe Debug: 44 3 command.c:79 script_command(): script_command - target Debug: 45 3 command.c:96 script_command(): script_command - target, argv[0]=ocd_target Debug: 46 3 command.c:96 script_command(): script_command - target, argv[1]=cortex_m3 Debug: 47 3 command.c:96 script_command(): script_command - target, argv[2]=little Debug: 48 3 command.c:96 script_command(): script_command - target, argv[3]=0 Debug: 50 3 command.c:79 script_command(): script_command - working_area Debug: 51 3 command.c:96 script_command(): script_command - working_area, argv[0]=ocd_working_area Debug: 52 3 command.c:96 script_command(): script_command - working_area, argv[1]=0 Debug: 53 4 command.c:96 script_command(): script_command - working_area, argv[2]=0x20000000 Debug: 54 4 command.c:96 script_command(): script_command - working_area, argv[3]=0x4000 Debug: 55 4 command.c:96 script_command(): script_command - working_area, argv[4]=nobackup Debug: 57 4 command.c:79 script_command(): script_command - bank Debug: 58 4 command.c:96 script_command(): script_command - bank, argv[0]=ocd_flash_bank Debug: 59 4 command.c:96 script_command(): script_command - bank, argv[1]=stellaris Debug: 60 4 command.c:96 script_command(): script_command - bank, argv[2]=0 Debug: 61 4 command.c:96 script_command(): script_command - bank, argv[3]=0 Debug: 62 4 command.c:96 script_command(): script_command - bank, argv[4]=0 Debug: 63 4 command.c:96 script_command(): script_command - bank, argv[5]=0 Debug: 64 4 command.c:96 script_command(): script_command - bank, argv[6]=0 Debug: 66 4 command.c:79 script_command(): script_command - init Debug: 67 5 command.c:96 script_command(): script_command - init, argv[0]=ocd_init Debug: 68 5 openocd.c:107 handle_init_command(): target init complete Debug: 69 5 parport.c:350 parport_init(): opening /dev/parport0... Debug: 70 5 parport.c:362 parport_init(): ...open Debug: 71 49 parport.c:234 parport_reset(): trst: 0, srst: 0 Debug: 72 49 openocd.c:114 handle_init_command(): jtag interface init complete Debug: 73 49 jtag.c:1560 jtag_init_inner(): Init JTAG chain Debug: 74 49 jtag.c:327 jtag_call_event_callbacks(): jtag event: JTAG controller reset (TLR or TRST) Debug: 75 49 jtag.c:1301 jtag_reset_callback(): - Debug: 76 49 jtag.c:327 jtag_call_event_callbacks(): jtag event: JTAG controller reset (TLR or TRST) Debug: 77 49 jtag.c:1301 jtag_reset_callback(): - Info: 78 54 jtag.c:1410 jtag_examine_chain(): JTAG device found: 0x3ba00477 (Manufacturer: 0x23b, Part: 0xba00, Version: 0x3) Debug: 79 54 jtag.c:327 jtag_call_event_callbacks(): jtag event: JTAG controller reset (TLR or TRST) Debug: 80 54 jtag.c:1301 jtag_reset_callback(): - Debug: 81 54 openocd.c:120 handle_init_command(): jtag init complete Debug: 82 54 cortex_swjdp.c:953 ahbap_debugport_init(): Debug: 83 64 cortex_swjdp.c:997 ahbap_debugport_init(): AHB-AP ID Register 0x14770011, Debug ROM Address 0xe00ff003 Debug: 84 67 target.c:1157 target_read_u32(): address: 0xe000ed00, value: 0x411fc231 Debug: 85 67 cortex_m3.c:1348 cortex_m3_examine(): CORTEX-M3 processor detected Debug: 86 67 cortex_m3.c:1349 cortex_m3_examine(): cpuid: 0x411fc231 Debug: 87 69 target.c:1157 target_read_u32(): address: 0xe000e004, value: 0x00000001 Debug: 88 71 target.c:1157 target_read_u32(): address: 0xe000e100, value: 0x01020000 Debug: 89 71 cortex_m3.c:1357 cortex_m3_examine(): interrupt enable[0] = 0x01020000 Debug: 90 73 target.c:1157 target_read_u32(): address: 0xe000e104, value: 0x00000000 Debug: 91 73 cortex_m3.c:1357 cortex_m3_examine(): interrupt enable[1] = 0x00000000 Debug: 92 75 target.c:1157 target_read_u32(): address: 0xe0002000, value: 0x00000260 Debug: 93 75 cortex_m3.c:1372 cortex_m3_examine(): FPB fpcr 0x260, numcode 6, numlit 2 Debug: 94 77 target.c:1157 target_read_u32(): address: 0xe0001000, value: 0x40000000 Debug: 95 77 openocd.c:123 handle_init_command(): jtag examine complete Debug: 96 77 openocd.c:129 handle_init_command(): flash init complete Debug: 97 78 openocd.c:133 handle_init_command(): NAND init complete Debug: 98 78 openocd.c:137 handle_init_command(): pld init complete Warning: 99 78 telnet_server.c:609 telnet_init(): no telnet port specified, using default port 4444 Warning: 100 78 gdb_server.c:2096 gdb_init(): no gdb port specified, using default port 3333 Debug: 101 78 gdb_server.c:2117 gdb_init(): gdb service for target cortex_m3 at port 3333 Warning: 102 78 tcl_server.c:178 tcl_init(): no tcl port specified, using default port 6666 Info: 103 2999 server.c:81 add_connection(): accepting 'telnet' connection from 0 Debug: 105 6194 command.c:79 script_command(): script_command - reset Debug: 106 6194 command.c:96 script_command(): script_command - reset, argv[0]=ocd_reset Debug: 107 6194 command.c:96 script_command(): script_command - reset, argv[1]=halt Debug: 108 6194 jtag.c:1597 jtag_init_reset(): Trying to bring the JTAG controller to life by asserting TRST / TLR Debug: 109 6194 jtag.c:1003 jtag_add_reset(): SRST line released Debug: 110 6194 jtag.c:1022 jtag_add_reset(): TRST line asserted Debug: 111 6194 jtag.c:327 jtag_call_event_callbacks(): jtag event: JTAG controller reset (TLR or TRST) Debug: 112 6194 jtag.c:1301 jtag_reset_callback(): - Debug: 113 6195 jtag.c:999 jtag_add_reset(): SRST line asserted Debug: 114 6195 jtag.c:1022 jtag_add_reset(): TRST line asserted Debug: 115 6195 jtag.c:327 jtag_call_event_callbacks(): jtag event: JTAG controller reset (TLR or TRST) Debug: 116 6195 jtag.c:1301 jtag_reset_callback(): - Debug: 117 6195 jtag.c:999 jtag_add_reset(): SRST line asserted Debug: 118 6195 jtag.c:1003 jtag_add_reset(): SRST line released Debug: 119 6195 parport.c:234 parport_reset(): trst: 1, srst: 0 Debug: 120 6345 parport.c:234 parport_reset(): trst: 1, srst: 1 Debug: 121 6345 parport.c:234 parport_reset(): trst: 0, srst: 1 Debug: 122 6495 parport.c:234 parport_reset(): trst: 0, srst: 0 Debug: 124 6817 jtag.c:1560 jtag_init_inner(): Init JTAG chain Debug: 125 6817 jtag.c:327 jtag_call_event_callbacks(): jtag event: JTAG controller reset (TLR or TRST) Debug: 126 6817 jtag.c:1301 jtag_reset_callback(): - Info: 127 6822 jtag.c:1410 jtag_examine_chain(): JTAG device found: 0x3ba00477 (Manufacturer: 0x23b, Part: 0xba00, Version: 0x3) Debug: 128 6822 jtag.c:327 jtag_call_event_callbacks(): jtag event: JTAG controller reset (TLR or TRST) Debug: 129 6822 jtag.c:1301 jtag_reset_callback(): - Debug: 130 6823 cortex_swjdp.c:953 ahbap_debugport_init(): Debug: 131 6830 cortex_swjdp.c:997 ahbap_debugport_init(): AHB-AP ID Register 0x14770011, Debug ROM Address 0xe00ff003 Debug: 132 6833 target.c:1157 target_read_u32(): address: 0xe000ed00, value: 0x411fc231 Debug: 133 6833 cortex_m3.c:1348 cortex_m3_examine(): CORTEX-M3 processor detected Debug: 134 6833 cortex_m3.c:1349 cortex_m3_examine(): cpuid: 0x411fc231 Debug: 135 6836 target.c:1157 target_read_u32(): address: 0xe000e004, value: 0x00000001 Debug: 136 6838 target.c:1157 target_read_u32(): address: 0xe000e100, value: 0x00020000 Debug: 137 6838 cortex_m3.c:1357 cortex_m3_examine(): interrupt enable[0] = 0x00020000 Debug: 138 6840 target.c:1157 target_read_u32(): address: 0xe000e104, value: 0x00000000 Debug: 139 6840 cortex_m3.c:1357 cortex_m3_examine(): interrupt enable[1] = 0x00000000 Debug: 140 6848 target.c:1157 target_read_u32(): address: 0xe0002000, value: 0x00000260 Debug: 141 6848 cortex_m3.c:1372 cortex_m3_examine(): FPB fpcr 0x260, numcode 6, numlit 2 Debug: 142 6850 target.c:1157 target_read_u32(): address: 0xe0001000, value: 0x40000000 Debug: 143 6850 cortex_m3.c:683 cortex_m3_assert_reset(): target->state: unknown Debug: 144 6855 jtag.c:999 jtag_add_reset(): SRST line asserted Debug: 145 6855 cortex_m3.c:455 cortex_m3_halt(): target->state: reset Debug: 146 6855 cortex_m3.c:787 cortex_m3_deassert_reset(): target->state: reset Debug: 147 6855 jtag.c:1003 jtag_add_reset(): SRST line released Debug: 148 6855 parport.c:234 parport_reset(): trst: 0, srst: 1 Debug: 149 7075 parport.c:234 parport_reset(): trst: 0, srst: 0 Warning: 151 7375 jtag.c:1217 jtag_check_value(): value captured during scan didn't pass the requested check: captured: 0x00 check_value: 0x01 check_mask: 0x0f Warning: 152 7375 jtag.c:1177 jtag_read_buffer(): in_handler reported a failed check Warning: 153 7377 target.c:406 target_process_reset(): Failed to reset target into halted mode - issuing halt Debug: 154 7377 cortex_m3.c:455 cortex_m3_halt(): target->state: unknown Warning: 155 7377 cortex_m3.c:465 cortex_m3_halt(): target was in unknown state when halt was requested Debug: 156 7378 target.c:416 target_process_reset(): Waiting for halted stated as appropriate Debug: 157 7379 target.c:1754 target_wait_state(): waiting for target halted... Error: 167 12379 target.c:1761 target_wait_state(): timed out while waiting for target halted Debug: 168 12380 command.c:404 run_command(): Command failed with error code -4 User: 169 12380 command.c:604 openocd_jim_vfprintf(): Runtime error, file "?", line 1: User: 170 12380 command.c:604 openocd_jim_vfprintf():
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