From: "Øyvind Harboe" <[EMAIL PROTECTED]>
> I was not able to apply this patch. Please create patch
> against svn trunk and post again. Your first patch
> applied fine, so do it in the same manner.
>
> Also add yourself to the copyright at the top of ep93xx.c
Sorry for late. I have been offlined few days.
here is a patch.
From: Rick Altherr <[EMAIL PROTECTED]>
> > +static void output_data(void)
> > +{
> > + int i;
> > + *gpio_data_register = output_value ^ INVERT_BITS;
> > + for ( i = 0; i < 10; i++ )
> > + ;
> > }
> >
>
> A for loop like that can't reliably be used as a delay loop.
Thank you for your advice.
I fix it.
--------
Hiroshi Ito
Media Lab. Inc.,
URL http://www.mlb.co.jp ( Sorry, Japanese only. )
TEL +81-3-5294-7255 FAX +81-3-5294-7256
Index: src/jtag/ep93xx.c
===================================================================
--- src/jtag/ep93xx.c (revision 1214)
+++ src/jtag/ep93xx.c (working copy)
@@ -2,6 +2,9 @@
* Copyright (C) 2005 by Dominic Rath *
* [EMAIL PROTECTED] *
* *
+ * Copyright (C) 2008 by Hiroshi Ito *
+ * [EMAIL PROTECTED]
*
+ * *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
@@ -25,6 +28,11 @@
#include "jtag.h"
#include "bitbang.h"
+/* Cable definition is *only* selectable at compile time */
+#if 1
+/* Rath's cable */
+#define INITIALIZE_G_ON_K 1
+
#define TDO_BIT 1
#define TDI_BIT 2
#define TCK_BIT 4
@@ -32,12 +40,30 @@
#define TRST_BIT 16
#define SRST_BIT 32
#define VCC_BIT 64
+#define RTCK_BIT 0
+#define VTREF_BIT 0
+#define INVERT_BITS 0
+#else
+/* ito's cable */
+#define INITIALIZE_PORTD_AS_FLOAT 1
+
+#define VCC_BIT 0
+#define TMS_BIT 1
+#define SRST_BIT 2
+#define TDI_BIT 4
+#define TDO_BIT 8
+#define TRST_BIT 16
+#define RTCK_BIT 32
+#define VTREF_BIT 64
+#define TCK_BIT 128
+#define INVERT_BITS 0/*(SRST_BIT|TRST_BIT)*/
+#endif
+
/* system includes */
#include <string.h>
#include <stdlib.h>
#include <stdio.h>
-#include <time.h>
#include <sys/mman.h>
#include <unistd.h>
#include <fcntl.h>
@@ -59,8 +85,6 @@
int ep93xx_init(void);
int ep93xx_quit(void);
-struct timespec ep93xx_zzzz;
-
jtag_interface_t ep93xx_interface =
{
.name = "ep93xx",
@@ -83,11 +107,40 @@
int ep93xx_read(void)
{
- return !!(*gpio_data_register & TDO_BIT);
+ return !!((*gpio_data_register ^ INVERT_BITS ) & TDO_BIT);
}
+static void output_data(void)
+{
+ *gpio_data_register = output_value ^ INVERT_BITS;
+}
+
+#if RTCK_BIT > 0
+static void ep93xx_wait_rtck(int tck)
+{
+ int timeout = 4096;
+ u8 bits = (*gpio_data_register ^ INVERT_BITS);
+ if ( tck ) tck = RTCK_BIT;
+#if VTREF_BIT > 0
+ if (((*gpio_data_register ^ INVERT_BITS ) & VTREF_BIT) ) {
+ /* target power is not up */
+ return;
+ }
+#endif
+ while (((*gpio_data_register ^ INVERT_BITS) & RTCK_BIT) != tck ) {
+ if ( --timeout <= 0 ) {
+ LOG_ERROR("ep93xx_wait_rtck timed out while waiting for end of
scan(0x%04X).",
+ *gpio_data_register );
+ break;
+ }
+ }
+}
+#endif
+
void ep93xx_write(int tck, int tms, int tdi)
{
+ int i = jtag_speed;
+
if (tck)
output_value |= TCK_BIT;
else
@@ -103,8 +156,15 @@
else
output_value &= ~TDI_BIT;
- *gpio_data_register = output_value;
- nanosleep(&ep93xx_zzzz, NULL);
+ do {
+ output_data();
+ } while (i-- > 0)
+ ;
+
+#if RTCK_BIT > 0
+ if ( jtag_speed == 0 )
+ ep93xx_wait_rtck(tck);
+#endif
}
/* (1) assert or (0) deassert reset lines */
@@ -120,8 +180,7 @@
else if (srst == 1)
output_value &= ~SRST_BIT;
- *gpio_data_register = output_value;
- nanosleep(&ep93xx_zzzz, NULL);
+ output_data();
}
int ep93xx_speed(int speed)
@@ -136,6 +195,8 @@
return ERROR_OK;
}
+#ifdef INITIALIZE_G_ON_K
+/* set a keypad interface as a GPIO PORT C and PORT D. */
static int set_gonk_mode(void)
{
void *syscon;
@@ -156,16 +217,16 @@
return ERROR_OK;
}
+#endif
int ep93xx_init(void)
{
+#ifdef INITIALIZE_G_ON_K
int ret;
+#endif
bitbang_interface = &ep93xx_bitbang;
- ep93xx_zzzz.tv_sec = 0;
- ep93xx_zzzz.tv_nsec = 10000000;
-
dev_mem_fd = open("/dev/mem", O_RDWR | O_SYNC);
if (dev_mem_fd < 0) {
perror("open");
@@ -180,12 +241,14 @@
return ERROR_JTAG_INIT_FAILED;
}
+#ifdef INITIALIZE_G_ON_K
ret = set_gonk_mode();
if (ret != ERROR_OK) {
munmap(gpio_controller, 4096);
close(dev_mem_fd);
return ret;
}
+#endif
#if 0
/* Use GPIO port A. */
@@ -206,20 +269,23 @@
gpio_data_direction_register = gpio_controller + 0x1c;
#endif
+#ifdef INITIALIZE_PORTD_AS_FLOAT
+ /* unused pins are set to input(port D). */
+ gpio_data_direction_register = gpio_controller + 0x1c;
+ *gpio_data_direction_register = 0;
+#endif
+
/* Use GPIO port C. */
gpio_data_register = gpio_controller + 0x08;
gpio_data_direction_register = gpio_controller + 0x18;
- LOG_INFO("gpio_data_register = %p\n", gpio_data_register);
- LOG_INFO("gpio_data_direction_reg = %p\n",
gpio_data_direction_register);
/*
* Configure bit 0 (TDO) as an input, and bits 1-5 (TDI, TCK
* TMS, TRST, SRST) as outputs. Drive TDI and TCK low, and
* TMS/TRST/SRST high.
*/
output_value = TMS_BIT | TRST_BIT | SRST_BIT | VCC_BIT;
- *gpio_data_register = output_value;
- nanosleep(&ep93xx_zzzz, NULL);
+ output_data();
/*
* Configure the direction register. 1 = output, 0 = input.
@@ -227,12 +293,17 @@
*gpio_data_direction_register =
TDI_BIT | TCK_BIT | TMS_BIT | TRST_BIT | SRST_BIT | VCC_BIT;
- nanosleep(&ep93xx_zzzz, NULL);
+#if VTREF_BIT > 0
+ if (((*gpio_data_register ^ INVERT_BITS ) & VTREF_BIT) ) {
+ LOG_INFO("target power is off (%X)", *gpio_data_register);
+ }
+#endif
return ERROR_OK;
}
int ep93xx_quit(void)
{
+ *gpio_data_direction_register = 0;
return ERROR_OK;
}
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