Quoting Øyvind Harboe <[email protected]>:

> > Open On-Chip Debugger (2008-06-19 19:00) svn: 717
>
> This is too old for the list to comment. Currently svn is at version 1300 or
> thereabouts(i.e. there has been ~500 changes to OpenOCD between
> the version you are using and the latest).

Thanks for the tip ... I've updated to the most recent version, but still have
some issues connecting (likely simply configuration related).  When I initially
run OpenOCD I get the following warning:

$URL:
https://[email protected]/svnroot/repos/openocd/tags/openocd-0.1.0/src/openocd.c
$
jtag_speed: 3
Info : JTAG tap: lpc2478.cpu tap/device found: 0x4f1f0f0f (Manufacturer: 0x787,
Part: 0xf1f0, Version: 0x4)
Error: JTAG tap: lpc2478.cpu             got: 0x4f1f0f0f (mfg: 0x787, part:
0xf1f0, ver: 0x4)
Error: JTAG tap: lpc2478.cpu expected 1 of 1: 0xffffffff (mfg: 0x7ff, part:
0xffff, ver: 0xf)
Error: trying to validate configured JTAG chain anyway...
Warn : EmbeddedICE version 7 detected, EmbeddedICE handling might be broken

I'm guess that this is because of the target config file.  I made a copy of
lpc2294.cfg, renamed it to olimex_lpc2478.cfg, and change the following lines:

if { [info exists CHIPNAME] } {
   set  _CHIPNAME $CHIPNAME
} else {
   set  _CHIPNAME lpc2294
}

TO:

if { [info exists CHIPNAME] } {
   set  _CHIPNAME $CHIPNAME
} else {
   set  _CHIPNAME lpc2478
}

If I change it back to 2294, though, I still get the same error, ust with a
different XXXX.cpu warning.  If I try debugging anyway, it doesn't work and I
get the same error and communications related warnings:

source .gdbinit
target remote 127.0.0.1:3333
Load$$ER_FLASH$$Base () at
E:\MicroFrameworkPK_v3_0\DeviceCode\coresrm\AssemblyCoderm\GNU_S\FirstEntry.s:102
102         msr     cpsr_c, #PSR_MODE_SYSTEM    @ go into System mode, 
interrupts
off
Current language:  auto; currently asm
monitor reset
JTAG tap: lpc2478.cpu tap/device found: 0x4f1f0f0f (Manufacturer: 0x787, Part:
0xf1f0, Version: 0x4)
JTAG tap: lpc2478.cpu             got: 0x4f1f0f0f (mfg: 0x787, part: 0xf1f0,
ver: 0x4)
JTAG tap: lpc2478.cpu expected 1 of 1: 0xffffffff (mfg: 0x7ff, part: 0xffff,
ver: 0xf)
trying to validate configured JTAG chain anyway...

monitor sleep 500
invalid mode value encountered
cpsr contains invalid mode value - communication failure

monitor poll
target state: running

monitor soft_reset_halt
requesting target halt and executing a soft reset
Failed to halt CPU after 1 sec

monitor arm7_9 force_hw_bkpts enable
invalid command name "arm7_9_force_hw_bkpts"
called at file "command.c", line 456
called at file "embedded:startup.tcl", line 89
called at file "embedded:startup.tcl", line 93
break PreStackEntry
Breakpoint 1 at 0x4: file
E:\MicroFrameworkPK_v3_0\DeviceCode\coresrm\AssemblyCoderm\GNU_S\FirstEntry.s,
line 110.
load
Loading section ER_STACK_BOTTOM, size 0x4 lma 0x40000400
Load failed
continue
Note: automatically using hardware breakpoints for read-only addresses.
Warning:
Cannot insert hardware breakpoint 1.
Could not insert hardware breakpoints:
You may have requested too many hardware breakpoints/watchpoints.

If anyone has had any success with a 2478 I'd appreciate the feedback!

Kevin

_____________________________________________________________________

Work is needed to express what is true; also to receive what is true.
We can express and receive what is false,  or at least what is super-
ficial, without any work at all.
                                                       -- Simone Weil
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