Mariano:
> if doesn't work what i always do is flash a small example programm
> which is comming in the olimex cd, after that program I can always
> have contact over the debugger, at least until a hard reset.
>
> I have no idea why, i have the problems since ever but I am not an
> openocd expert :(
After manually transferring a uboot hex file via Flash Magic as you suggested,
at least the soft resets, etc., work again (though I don't really know why), and
it seems I transferred the flash. I'll include the config files I used in this
email. I still have problems with the debugging, but at least it's progress.
The real question is wy flashing another hex file fixes some of the problems?
At present, these are the commands I'm using:
--------------------------------------
target remote 127.0.0.1:3333
monitor reset
monitor sleep 500
monitor poll
monitor soft_reset_halt
monitor arm7_9 force_hw_bkpts enable
break PreStackEntry
load
continue
--------------------------------------
If I have any more success tonight, I'll put an update here.
This is the output I'm getting at the moment:
-----------------------
source .gdbinit
target remote 127.0.0.1:3333
0x7fffe040 in ?? ()
Current language: auto; currently c++
monitor reset
JTAG tap: lpc2478.cpu tap/device found: 0x4f1f0f0f (Manufacturer: 0x787, Part:
0xf1f0, Version: 0x4)
JTAG Tap/device matched
monitor sleep 500
monitor poll
target state: running
monitor soft_reset_halt
requesting target halt and executing a soft reset
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0xa00000d3 pc: 0x00000000
monitor arm7_9 force_hw_bkpts enable
invalid command name "arm7_9_force_hw_bkpts"
called at file "command.c", line 456
called at file "embedded:startup.tcl", line 89
called at file "embedded:startup.tcl", line 93
break PreStackEntry
Breakpoint 1 at 0x4: file
E:\MicroFrameworkPK_v3_0\DeviceCode\coresrm\AssemblyCoderm\GNU_S\FirstEntry.s,
line 110.
load
Loading section ER_STACK_BOTTOM, size 0x4 lma 0x40000400
Loading section ER_STACK_TOP, size 0x4 lma 0x40003ff0
Loading section ER_HEAP_BEGIN, size 0x4 lma 0x40006000
Loading section ER_HEAP_END, size 0x4 lma 0x40007f00
Loading section ER_FLASH, size 0x11e08 lma 0x0
Loading section ER_IRAM, size 0x2c lma 0x11e10
Loading section ER_RAM_RO, size 0x238 lma 0x11e40
Loading section ER_RAM_RW, size 0x8a0 lma 0x12080
Start address 0x0, load size 76060
Transfer rate: 14 KB/sec, 6338 bytes/write.
continue
Note: automatically using hardware breakpoints for read-only addresses.
Breakpoint 1, PreStackEntry () at
E:\MicroFrameworkPK_v3_0\DeviceCode\coresrm\AssemblyCoderm\GNU_S\FirstEntry.s:110
110 B PreStackInit
Current language: auto; currently asm
Current language: auto; currently c++
--------------------------------------
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME lpc2478
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
# force an error till we get a good number
set _CPUTAPID 0x4f1f0f0f
}
#daemon configuration
telnet_port 4444
gdb_port 3333
tcl_port 6666
#jtag speed (this may need to be adjusted to get openocd to work)
jtag_speed 3
#delays on reset lines
jtag_nsrst_delay 200
jtag_ntrst_delay 200
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst srst_pulls_trst
#jtag scan chain
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id
$_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position
$_TARGETNAME -variant arm7tdmi-s_r4
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000
-work-area-size 0x4000 -work-area-backup 0
#flash configuration
#flash bank lpc2000 <base> <size> 0 0 <target#> <variant>
flash bank lpc2000 0x0 0x80000 0 0 0 lpc2000_v2 12000 calc_checksum
# For more information about the configuration files, take a look at:
# openocd.texi
gdb_breakpoint_override hard
gdb_memory_map enable
gdb_flash_program enable
#debug_level 3
#interface
interface ft2232
ft2232_device_desc "Olimex OpenOCD JTAG A"
ft2232_layout olimex-jtag
ft2232_vid_pid 0x15ba 0x0003
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