With recent SVN at OMAP3 based Beagle we get:
-- cut --
> scan_chain
TapName | Enabled | IdCode Expected IrLen
IrCap IrMask Instr
---|--------------------|---------|------------|------------|------|------|------|---------
0 | omap3.cpu | n | 0x00000000 | 0x0b6d602f | 0x04 |
0x01 | 0x00 | 0x0f
1 | omap3.jrc | Y | 0x0b7ae02f | 0x0b7ae02f | 0x06 |
0x01 | 0x0f | 0x3f
> jtag tapenable omap3.cpu
Enabling Cortex-A8 @ OMAP3
Cortex-A8 @ OMAP3 enabled
1
> scan_chain
TapName | Enabled | IdCode Expected IrLen
IrCap IrMask Instr
---|--------------------|---------|------------|------------|------|------|------|---------
0 | omap3.cpu | Y | 0x00000000 | 0x0b6d602f | 0x04 |
0x01 | 0x00 | 0x0f
1 | omap3.jrc | Y | 0x0b7ae02f | 0x0b7ae02f | 0x06 |
0x01 | 0x0f | 0x3f
-- cut --
Looking at this, I wonder
a) if we should add "jtag tapenable omap3.cpu" command to
configuration script omap3530.cfg? I think our goal is to access/debug
the ARM, so we should enable access to it by default not needing to do
any manual steps?
b) why after tapenable command IDCode of omap3.cpu isn't updated and
still reported as 0x00000000? Most probably this is only a cosmetic
issue, but updating this would automatically show that configuration
was successful. And it would avoid a manual check with
-- cut --
> irscan omap3.cpu 0xE
> drscan omap3.cpu 32 0x0
0B6D602F
-- cut --
What do you think?
Best regards
Dirk
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