On Mar 14, 2009, at 12:01 AM, Dirk Behme wrote:
With recent SVN at OMAP3 based Beagle we get: -- cut --scan_chainTapName | Enabled | IdCode Expected IrLen IrCap IrMask Instr ---| --------------------| ---------|------------|------------|------|------|------|--------- 0 | omap3.cpu | n | 0x00000000 | 0x0b6d602f | 0x04 | 0x01 | 0x00 | 0x0f 1 | omap3.jrc | Y | 0x0b7ae02f | 0x0b7ae02f | 0x06 | 0x01 | 0x0f | 0x3fjtag tapenable omap3.cpuEnabling Cortex-A8 @ OMAP3 Cortex-A8 @ OMAP3 enabled 1scan_chainTapName | Enabled | IdCode Expected IrLen IrCap IrMask Instr ---| --------------------| ---------|------------|------------|------|------|------|--------- 0 | omap3.cpu | Y | 0x00000000 | 0x0b6d602f | 0x04 | 0x01 | 0x00 | 0x0f 1 | omap3.jrc | Y | 0x0b7ae02f | 0x0b7ae02f | 0x06 | 0x01 | 0x0f | 0x3f -- cut -- Looking at this, I wonder a) if we should add "jtag tapenable omap3.cpu" command to configuration script omap3530.cfg? I think our goal is to access/debug the ARM, so we should enable access to it by default not needing to do any manual steps?
Yes, it should do this automatically
b) why after tapenable command IDCode of omap3.cpu isn't updated and still reported as 0x00000000? Most probably this is only a cosmetic issue, but updating this would automatically show that configuration was successful. And it would avoid a manual check with
jtag tapenable doesn't cause a chain validation. You are correct that it is a cosmetic issue only. If a new validation is done, it will show up correctly.
-- cut --irscan omap3.cpu 0xE drscan omap3.cpu 32 0x00B6D602F -- cut -- What do you think? Best regards Dirk _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
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