Hi jtag_khz ?? do you have code in flash that configures the pll ?
When I test, I get exactly the same behaviour when khz>=2000 (FT2232 ) . But it works well for slower speeds. Once the onboard clock config code has configured the pll (72khz) then I can use 6000khz without problems. There are some weirdness in the whole rest sequence with resetting first the jtag, and this rsets my target also, and then a little later resetting the Cortex core giving two rests in quick succeion. It works but I dont like it. For my old LM2S811 reset does not work well, but I have not had time to really dig in to this, just noticed the dual rsets and used the onboard reset button, works great all the time :) . Regards, Magnus Øyvind Harboe wrote: > "reset halt" for STM32 appears to be broken in SVN HEAD... > > I don't know if this is a regression. > > "reset run", "halt", "flash probe 0" works. > "reset halt", "flash probe 0" fails. > > Any ideas? > > Log attached.... > > > Open On-Chip Debugger > >> debug_level 3 >> > > >> reset halt >> > JTAG tap: stm32.cpu tap/device found: 0x3ba00477 (Manufacturer: 0x23b, Part: > 0x > ba00, Version: 0x3) > JTAG Tap/device matched > JTAG tap: stm32.bs tap/device found: 0x16410041 (Manufacturer: 0x020, Part: > 0x64 > 10, Version: 0x1) > JTAG Tap/device matched > AHBAP: dp_select 0x10, ap_csw 0xa2000002, ap_tar 0xe000edf0 > SWJ-DP OVERRUN - check clock or reduce jtag speed > dcb_dhcsr 0x1010001, nvic_shcsr 0x0, nvic_cfsr 0x0, nvic_bfar 0x200007f4 > AHBAP: dp_select 0x10, ap_csw 0xa2000002, ap_tar 0xe000edf0 > SWJ-DP OVERRUN - check clock or reduce jtag speed > dcb_dhcsr 0x1010001, nvic_shcsr 0x0, nvic_cfsr 0x0, nvic_bfar 0x200007f4 > AHBAP: dp_select 0x10, ap_csw 0xa2000002, ap_tar 0xe000edf0 > SWJ-DP OVERRUN - check clock or reduce jtag speed > dcb_dhcsr 0x1010001, nvic_shcsr 0x0, nvic_cfsr 0x0, nvic_bfar 0x200007f4 > BUG: keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet > not > sent! (1170) > timed out while waiting for target halted > Runtime error, file "embedded:startup.tcl", line 211: > expected return code but got 'TARGET: stm32.cpu - Not halted' > in procedure 'ocd_process_reset' > Runtime error, file "command.c", line 456: > > >> flash probe 0 >> > Target not halted > unknown error when probing flash bank '#0' at 0x00000000 > > >> reset run >> > JTAG tap: stm32.cpu tap/device found: 0x3ba00477 (Manufacturer: 0x23b, Part: > 0x > ba00, Version: 0x3) > JTAG Tap/device matched > JTAG tap: stm32.bs tap/device found: 0x16410041 (Manufacturer: 0x020, Part: > 0x64 > 10, Version: 0x1) > JTAG Tap/device matched > AHBAP: dp_select 0x10, ap_csw 0xa2000002, ap_tar 0xe000edf0 > SWJ-DP OVERRUN - check clock or reduce jtag speed > dcb_dhcsr 0x1010001, nvic_shcsr 0x0, nvic_cfsr 0x0, nvic_bfar 0x200007f4 > > >> halt >> > target state: halted > target halted due to debug-request, current mode: Handler SysTick > xPSR: 0x6100000f pc: 0x08000144 > > >> flash probe 0 >> > device id = 0x20016410 > flash size = 128kbytes > flash 'stm32x' found at 0x08000000 > > > > > > ------------------------------------------------------------------------ > > This body part will be downloaded on demand. _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
