On Tuesday 09 June 2009, Magnus Lundin wrote: > The type of target/tap initialisation that needs dr/ir scans to setup > the jtag chain and controller are run before the target can be > examined. The type of target initialisations that sets memory mapped > registers with mww are not affected by polling- > > Polls, and many other commands, are not sent to targets that has not > been examined. So the initial dr/ir scans are not interrupted. > > If we want to do manual dr/ir scans after the target has been setup, > initialised and examined, the it is reasonable that we have to use poll off. > > So what I think we need is a delayed target examination, something like > when defining a target we set a flag -delay_examine to signal that more > setup must be done before the targtet can be examined with arp_examine.
And presumably you've seen something like the info at this page: http://tiexpressdsp.com/index.php/ICEPICK The "how to add devices to an ICEpick-C scan chain" highlights one point: the JRC commands to add the ARM (and, for DaVinci, the ETB) to the scan chain must be done each time the TAPs go to the RESET state (via TMS or nTRST). _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
