Qiang Wang wrote: > hello, all > sorry, I repeat the message again because nobody answer it. > I test the JTAG interface with Logic Analyze Device, today . > I found some fact as below. > > 1. the jtag_khz will affect the TCK of JTAG. > When 6000, It will be 6MHz of the TCK, when 3000, the TCK will be 3MHz. > But if I change the jtag_khz beyond the 6000, the TCK will fix in 6MHz. > Can anybody explain the reason for me?
The interface you are using can't go faster than 6MHz. Since using a slower clock rate is always safe, OpenOCD uses the highest available rate instead of failing your request. cu Michael _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
