On Tuesday 13 October 2009, Øyvind Harboe wrote: > > So I'd think the current code is behaving, modulo issues > > you might have with iMX31 ... > > The currrent code target/arm11* code doesn't assert srst, > it just issues a halt during assert.
A quick skim of the docs suggests the right way to get a halt after SRST involves setting halt mode, then setting the reset bit in the vector catch hardware. _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
