On Monday 12 October 2009, Henry Margies wrote: > By the way, I just found the BSDL file for the NS9360 CPU. > Not sure if that is helping, but it says (things like): > > -- Specifies the number of bits in the instruction register. > > attribute INSTRUCTION_LENGTH of cooper: entity is 3;
So that's not the CPU itself being described ... it's the boundary scan TAP. I've seen this done in two ways: - Like Atmel does, with a signal controlling which TAP is exposed through the JTAG signals. Developers use the "not boundary scan" option. Production test uses the other one. - Like various other vendors. The scan chain has two TAPs ... one for boundary scan, the other for ARM. Doesn't the current code tell you how many TAPs it finds? _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
