On Saturday 24 October 2009, Øyvind Harboe wrote:
> Seems like you are not too excited about register
> caching either....
>
> Before deleting all register caching we have to consider
> the performance impact. Perhaps we could remove
> register caching from the user's point of view, but
> keep it for performance reasons... who knows when a
> cache will be refreshed and stale though....
That was my point about it needing to be done at the
target level.
What we have now is sort of "writeback" but there's
no comprehensive scheme for invalidation ...
We probably need something like:
- writeback:
halt --> run
- selective invalidate (not most ARM debug regs):
halt --> run
warm reset
- complete invalidate
cold/powerup reset
- selective read (not all registers get used):
run (or reset) --> halt
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