I don't know if this patch actually works, but it does compile :). This is
how the davinci driver would change with the update as far as I can tell. I
don't have a board with this chip, so I'll leave it to you to try it out.
// Dean Glazeski
On Fri, Nov 20, 2009 at 2:03 PM, David Brownell <[email protected]> wrote:
> On Thursday 19 November 2009, Dean Glazeski wrote:
> > I found a chunk of code that was used by both the
> nand_[write|read]_page_raw
> > and I thought it might be helpful to NAND devices that implement the
> > read_page function. In my case, I don't want to copy the work like the
> > davinci driver does :P. Let me know if this is good for committing.
>
> Could you send another patch showing how this would
> simplify, for example, the DaVinci driver?
>
> At first glance this looks OK.
>
> ISTR wanting to just get something working first for
> DaVinci, and then only going back to fix one of the
> speed issues for page writes. I remember not liking
> the need to research that aspect of the NAND command
> model ... along with getting multiple ECC modes to
> work (sigh).
>
>
>
diff --git a/src/flash/davinci_nand.c b/src/flash/davinci_nand.c
index f6b8bcf..2b5f811 100644
--- a/src/flash/davinci_nand.c
+++ b/src/flash/davinci_nand.c
@@ -319,29 +319,6 @@ static int davinci_read_page(struct nand_device *nand, uint32_t page,
return info->read_page(nand, page, data, data_size, oob, oob_size);
}
-static void davinci_write_pagecmd(struct nand_device *nand, uint8_t cmd, uint32_t page)
-{
- struct davinci_nand *info = nand->controller_priv;
- struct target *target = info->target;
- int page3 = nand->address_cycles - (nand->page_size == 512);
-
- /* write command ({page,otp}x{read,program} */
- target_write_u8(target, info->cmd, cmd);
-
- /* column address (beginning-of-page) */
- target_write_u8(target, info->addr, 0);
- if (nand->page_size > 512)
- target_write_u8(target, info->addr, 0);
-
- /* page address */
- target_write_u8(target, info->addr, page);
- target_write_u8(target, info->addr, page >> 8);
- if (page3)
- target_write_u8(target, info->addr, page >> 16);
- if (page3 == 2)
- target_write_u8(target, info->addr, page >> 24);
-}
-
static int davinci_writepage_tail(struct nand_device *nand,
uint8_t *oob, uint32_t oob_size)
{
@@ -400,7 +377,7 @@ static int davinci_write_page_ecc1(struct nand_device *nand, uint32_t page,
break;
}
- davinci_write_pagecmd(nand, NAND_CMD_SEQIN, page);
+ nand_page_command(nand, page, NAND_CMD_SEQIN, !oob);
/* scrub any old ECC state */
target_read_u32(target, ecc1_addr, &ecc1);
@@ -491,7 +468,7 @@ static int davinci_write_page_ecc4(struct nand_device *nand, uint32_t page,
break;
}
- davinci_write_pagecmd(nand, NAND_CMD_SEQIN, page);
+ nand_page_command(nand, page, NAND_CMD_SEQIN, !oob);
/* scrub any old ECC state */
target_read_u32(target, info->aemif + NANDERRVAL, &ecc4);
@@ -552,7 +529,7 @@ static int davinci_write_page_ecc4infix(struct nand_device *nand, uint32_t page,
const uint32_t ecc4_addr = info->aemif + NAND4BITECC;
uint32_t fcr, ecc4;
- davinci_write_pagecmd(nand, NAND_CMD_SEQIN, page);
+ nand_page_command(nand, page, NAND_CMD_SEQIN, !oob);
/* scrub any old ECC state */
target_read_u32(target, info->aemif + NANDERRVAL, &ecc4);
@@ -603,14 +580,7 @@ static int davinci_write_page_ecc4infix(struct nand_device *nand, uint32_t page,
static int davinci_read_page_ecc4infix(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
- davinci_write_pagecmd(nand, NAND_CMD_READ0, page);
-
- /* large page devices need a start command */
- if (nand->page_size > 512)
- davinci_command(nand, NAND_CMD_READSTART);
-
- if (!davinci_nand_ready(nand, 100))
- return ERROR_NAND_OPERATION_TIMEOUT;
+ nand_page_command(nand, page, NAND_CMD_READ0, !oob);
/* NOTE: not bothering to compute and use ECC data for now */
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