Recently, I've been using quite a few commercial jtag tools from chip vendors.
One thing I've noticed is that they all have implement the design with an small usb-controller + FPGA of some type (typically a xilinx spartan). I can see the real benefit, they download and flash the target at an unbelievable speed, ie: couple seconds for 256K of data. In contrast, non-fpga solutions, (bitbang & ftdi, etc) are much slower overall. My guess is they are creating a hugely fast chip specific download engine they just feed data bytes to - and it operates at some hugely fast speed (that probably helps) In theory, the dongle has 2 modes, "simple slow bitbang" - once the target is determined, download an acceleration engine the fpga. The debugger step-in/over/line/etc rate with these tools is so fast... perhaps they have have implemented some common tasks like step and register dump type sequences in the dongle's fpga. Watch windows are for example very snappy. Sadly, that also requires a lot of engineering expertise to write that fpga code. in the cases I've seen [ie: vendor supplied tools] the chip companies also have a large pool of people who know or understand verilog/vhdl and can write such fpga code. It is just blindingly fast... -Duane. _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
