Drasko DRASKOVIC wrote:
In a SPrAcc vs PrAcc debate, one thing accured to me : can it be that
SPrAcc is actualy shifted-out value of PrAcc from CONTROL register
(i.e. same internaly hard-wired value). Is this mechanism maybe
provided by MIPS to easily and fast check PrAcc value during FASTDATA
access - i.e. checking chifted out SPrAcc is sufficient (because it
is exactly the same thing that is in PrAcc) ?
Specification is the mess...
BR,
Drasko
Yes, there are some mechanism between SPrAcc and PrACC.
But, not internaly hard-wired value
from Table 6-11 Fastdata Register Field Description
<<
Shifting in a zero value requests completion of the
Fastdata access. The PrAcc bit in the EJTAG Control
register is overwritten with zero when the access
succeeds. (The access succeeds if PrAcc is one and
the operation address is in the legal dmseg segment
Fastdata area.) When successful, a one is shifted out.
Shifting out a zero indicates a Fastdata access failure.
Shifting in a one does not complete the Fastdata
access and the PrAcc bit is unchanged. Shifting out a
one indicates that the access would have been
successful if allowed to complete and a zero indicates
the access would not have successfully completed.
>>
Regards,
Laurent Gauch
http://www.amontec.com
http://www.amontec.com/jtagkey.shtml
Amontec USB JTAG Cable solutions Amontec JTAGkey Amontec JTAGkey-2
Amontec JTAGkey-2P
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