On Mon, May 02, 2011 at 03:24:00AM +0200, Øyvind Harboe wrote:
> Also, don't you need to flush the data cache somehow before
> invalidating the data cache?
Good question. I thought the arm926ejs write code, which feroceon
uses, was already doing that. But I really don't know enough about
this architecture. This seems to work, but I've only tested it
lightly. Is there any kind of test suite I could use? Or any
feroceon experts who could review it?
> For now ARM targets have implemented the handling
> of caches and breakpoints in target->type->write_memory()
> by making single word writes(16 and 32) safe for setting
> and restoring software breakpoints.
The arm926ejs_write_memory code says:
"Also it should be moved to the callbacks that handle breakpoints
specifically and not the generic memory write fn's. See XScale code."
And the XScale code does it somewhat similarly to my patch: with cache
invalidation in just the breakpoint set/unset routines.
In any case, I'll "un-generalize" my patch and resubmit a new version.
--
Eric Cooper e c c @ c m u . e d u
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