hi there,
I am trying to debug u-boot on samsung s3c2410 board with OpenOCD and
Eclipse. The initialization script is listed below:
[code]
source [find jlink.cfg]
jtag_khz 500
jtag_nsrst_delay 100
jtag_ntrst_delay 100
source [find samsung_s3c2410.cfg]
$_TARGETNAME configure -event reset-init { up2410_init }
$_TARGETNAME configure -event gdb-attach { reset init }
proc up2410_init { } {
echo "---------- PLL and SDRAM init start ---------"
mww 0x11111110 0x48000000
mww 0x00007FFC 0x48000004
mww 0x00007FFC 0x48000008
mww 0x00000700 0x4800000c
mww 0x00000700 0x48000010
mww 0x00002E50 0x48000014
mww 0x00002E50 0x48000018
mww 0x00018005 0x4800001c
mww 0x00018005 0x48000020
mww 0x008c04e9 0x48000024
mww 0x000000b2 0x48000028
mww 0x00000030 0x4800002c
mww 0x00000030 0x48000030
echo "---------- PLL and SDRAM init done ---------"
}
set _NANDNAME $_CHIPNAME.nand
nand device $_NANDNAME s3c2410 $_TARGETNAME
init
reset init
[/code]
I havn't initialize NOR flash for this board has no NOR flash.
When I start OpenOCD, it seems everything goes well:
[code]
bear@debian:~/work/bootloader/openocd$ sudo
~/Tools/Application/openocd_git/bin/openocd
Open On-Chip Debugger 0.5.0-dev-00875-g6349a47-dirty (2011-05-19-08:49)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.berlios.de/doc/doxygen/bugs.html
Warn : Adapter driver 'jlink' did not declare which transports it
allows; assuming legacy JTAG-only
Info : only one transport option; autoselect 'jtag'
500 kHz
adapter_nsrst_delay: 100
jtag_ntrst_delay: 100
trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain
fast memory access is enabled
dcc downloads are enabled
Info : J-Link initialization started / target CPU reset initiated
Info : J-Link ARM V7 compiled Jul 30 2008 11:26:34
Info : J-Link caps 0x9ff7bbf
Info : J-Link hw version 70000
Info : J-Link hw type J-Link
Info : J-Link max mem block 9736
Info : J-Link configuration
Info : USB-Address: 0xff
Info : Kickstart power on JTAG-pin 19: 0xffffff01
Info : Vref = 3.300 TCK = 1 TDI = 0 TDO = 0 TMS = 0 SRST = 0 TRST = 0
Info : J-Link JTAG Interface ready
Info : clock speed 500 kHz
Info : JTAG tap: s3c2410.cpu tap/device found: 0x0032409d (mfg: 0x04e,
part: 0x0324, ver: 0x0)
Info : Embedded ICE version 2
Info : s3c2410.cpu: hardware has 2 breakpoint/watchpoint units
Info : JTAG tap: s3c2410.cpu tap/device found: 0x0032409d (mfg: 0x04e,
part: 0x0324, ver: 0x0)
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000
MMU: disabled, D-Cache: disabled, I-Cache: disabled
---------- PLL and SDRAM init start ---------
---------- PLL and SDRAM init done ---------
[code]
But when I clicked on the Debug button of Eclipse, a error comes:
[code]
Info : accepting 'gdb' connection from 3333
Info : JTAG tap: s3c2410.cpu tap/device found: 0x0032409d (mfg: 0x04e,
part: 0x0324, ver: 0x0)
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000
MMU: disabled, D-Cache: disabled, I-Cache: disabled
---------- PLL and SDRAM init start ---------
---------- PLL and SDRAM init done ---------
Warn : acknowledgment received, but no packet pending
Info : JTAG tap: s3c2410.cpu tap/device found: 0x0032409d (mfg: 0x04e,
part: 0x0324, ver: 0x0)
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000
MMU: disabled, D-Cache: disabled, I-Cache: disabled
---------- PLL and SDRAM init start ---------
---------- PLL and SDRAM init done ---------
Error: DCC write failed, expected end address 0x33f83f70 got 0x48
Error: DCC write failed, expected end address 0x33f87f10 got 0x48
[/code]
And in Eclipse Console window:
[code]
target remote localhost:3333
0x00000000 in ?? ()
monitor reset init
JTAG tap: s3c2410.cpu tap/device found: 0x0032409d (mfg: 0x04e, part:
0x0324, ver: 0x0)
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000
MMU: disabled, D-Cache: disabled, I-Cache: disabled
---------- PLL and SDRAM init start ---------
---------- PLL and SDRAM init done ---------
load
Loading section .text, size 0x30640 lma 0x33f80000
Load failed
[/code]
The command to initialize gdb is listed below:
[code]
target remote localhost:3333
monitor reset init
load
[/code]
I tried to telnet to localhost:4444 and execute "load_image
~/work/bootlaoder/workspace/zsboot/u-boot 0x30000000", the same error
occurred.
Notice: the error in OpenOCD is:
Error: DCC write failed, expected end address 0x33f87f10 got 0x48
but sometimes not. The address and expected address are sometimes
different but I don't know what they stand for.
Could you give some help?
BTW: I tried to use a wiggler cable to do these things, but the
'reset' command cannot be executed. I think this is caused by my
wiggler cable and I have already ordered another one.
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