On 2011/05/30 5:22 AM, Bear wrote: > hi, > I have solved that problem and you are right, it is a PLL configuration > problem. > Now both J-Link and OpenJTAG can work well on my uptech 2410 with my new > configuration file. But wiggler still cannot "reset halt" my board. > Thanks for your help! >
Hi, Can you explain how you fixed the PLL? I seem to have the same problem with my JLink (clone) adapter, and a DNS323 (Orion5x) board. Thanks Rogan _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
