Hello Drasko, Wednesday, July 6, 2011, 12:00:11 AM, you wrote:
>> DD> On the first look, this can be accomplished by reading CP0 PRId >> DD> register, but Revision field is not quite well explained. >> DD> I have no idea how to obtain info if the proc is MIPS32/64 Rev2 >> compliant. >> >> You should use the Config register (CP0 Register 16). AT field (bits >> 14:13) tells if it's MIPS32 or MIPS64, and AR (12:10) is the release. DD> Hi Igor, DD> thanks, I just took a quick look, and I thought that CP0 PRId would be DD> more appropriate. I saw that bits 7:0 encode the release, but I did DD> not get the codes - they are not well explained in the doc. I would expect that too, but it's not the case, apparently. Bits 7:0 is the manufacturer-specific chip revision ID, not the ISA release. DD> Maybe CP0 Config would be a better place to look, though naming is not DD> suggestive - Config is used to configure your CPU (it should be RW) DD> and ID is where you want to read Read Only information... Actually, most of the fields in Config are read-only. Not very logical but that's how it is. DD> I will look tomorrow again, I do not have docs at my disposal now. DD> BTW. CP0 Config (reg 16) has 3 selects. Which one did you mention - 0, DD> 1 or 2 ? Select 0. See MIPS64 Arch vol 3 for more details. http://mips.com/products/architectures/mips64/#specifications -- WBR, Igor mailto:[email protected] _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
